- 20 Mar, 2018 1 commit
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Michalis Pappas authored
Allow qemu users to enable stack protection. Since the virt platform does not provide an RNG, use a basic, timer-based, canary generation, similarly to FVP. Increase SRAM size and BL2 size to fit images when stack protection is enabled. Notice that stack protection is not enabled by default in qemu. Fixes ARM-software/tf-issues#568 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 04 Mar, 2018 1 commit
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Michalis Pappas authored
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are accessed. Increase the size of DEVICE1 memory to include the range of UART1. Fixes ARM-software/tf-issues#560 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 28 Feb, 2018 1 commit
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Michalis Pappas authored
Update qemu_configure_mmu_##_el to add an additional region for code, marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC. Update calls to QEMU_CONFIGURE_BLx_MMU() to pass an additional region for code. Update calls to pass regions defined in common_def.h. Increase MAX_MMAP_REGIONS to 10. Enable SEPARATE_CODE_AND_RODATA by default on QEMU builds. Fixes ARM-software/tf-issues#558 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 05 Feb, 2018 1 commit
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Etienne Carriere authored
Define Qemu AArch32 implementation for some platform functions (core position, secondary boot cores, crash console). These are derived from the AArch64 implementation. BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is the first executable image after BL2. Support SP_MIN and OP-TEE as BL32: create a sp_min make script target in Qemu, define mapping for IMAGE_BL32 Minor fix Qemu return value type for plat_get_ns_image_entrypoint(). Qemu model for the Cortex-A15 does not support the virtualization extension although the core expects it. To overcome the issue, Qemu ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0. Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform used by the Qemu platform. Qemu Cortex-A15 model integrates a single cluster with up to 4 cores. Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 26 Oct, 2017 1 commit
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Etienne Carriere authored
OP-TEE dedicates the end of the Qemu secure DRAM as specific out-of-TEE secure RAM. To support this configuration the trusted firmware should not load OP-TEE resources in this area. To overcome the issue, OP-TEE pageable image is now loaded 2MByte above the secure RAM base address. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 24 Oct, 2017 1 commit
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Etienne Carriere authored
Before this change, plat_secondary_cold_boot_setup reads wake up mailbox as a byte array but through 64bit accesses on unaligned 64bit addresses. In the other hand qemu_pwr_domain_on wakes secondary cores by writing into a 64bit array. This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE explicitly specifies it. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 24 Aug, 2017 2 commits
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Jens Wiklander authored
OP-TEE may have extra images to be loaded. Load them one by one and do the parsing. In this patch, ARM TF need to load up to 3 images for OP-TEE: header, pager and pages images. Header image is the info about optee os and images. Pager image include pager code and data. Paged image include the paging parts using virtual memory. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Jens Wiklander authored
Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE and PLAT_VIRT_ADDR_SPACE_SIZE. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 18 Jan, 2017 1 commit
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Masahiro Yamada authored
I do not see any line that references BL32_SIZE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 09 Jun, 2016 1 commit
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Jens Wiklander authored
This patch adds support for the QEMU virt ARMv8-A target. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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