- 31 Jan, 2019 1 commit
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Varun Wadekar authored
This patch removes the error print displayed when bpmp init fails. On platforms that do not load the bpmp firmware, this print is seen on every cluster idle and powerdown request, cluttering the logs. Change-Id: I9e30007a913080406052fc32d5360ff70a019d75 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 23 Jan, 2019 1 commit
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Varun Wadekar authored
This patch returns error if BPMP initialization fails. The platform code marks the cluster as "runnning" since we wont be able to get it into the low power state without BPMP. Change-Id: I86f51d478626240bb7b4ccede8907674290c5dc1 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 18 Jan, 2019 2 commits
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Peter De Schrijver authored
To deal with upcoming EMC periodic compensation, increase the BPMP timeout to 2ms. Change-Id: I8572c031168defd15504d905c4d625f44dd7fa3d Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
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Anthony Zhou authored
MISRA Rule 10.3, the value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The essential type of a enum member is anonymous enum, the enum member should be casted to the right type when using it. Both UL and ULL suffix equal to uint64_t constant in compiler aarch64-linux-gnu-gcc, to avoid confusing, only keep U and ULL suffix in platform code. So in some case, cast a constant to uint32_t is necessary. Change-Id: I1aae8cba81ef47481736e7f95f53570de7013187 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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- 16 Jan, 2019 2 commits
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Varun Wadekar authored
This patch fixes the logic to check if Atomics hardware block is powered on during boot Reported by: Peter De Schrijver <pdeschrijver@nvidia.com> Change-Id: I4a6521bcee37225d1402321151c48fa631776b8a Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch adds the driver to communicate with the BPMP processor for power management use cases. BPMP controls the entry into cluster and system power states. The Tegra210 platform port queries the BPMP to calculate the target state for the cluster. In case BPMP does not allow CCx entry, the core enters a power down state. Change-Id: I9c40aef561607a0b02c49b7f8118570eb9105cc9 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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