# Sample NVRAM for BCM94339 WLCSP with eTR,iPA, and eLNA. 
sromrev=11
boardrev=0x1100
boardtype=0x06c9
boardflags=0x10081401
boardflags2=0x00000000
boardflags3=0x08001188
#boardnum=57410 
macaddr=00:90:4c:c5:12:38
ccode=0
regrev=0
antswitch=0
pdgain2g=7
pdgain5g=7
tworangetssi2g=0
tworangetssi5g=0
vendid=0x14e4
devid=0x43ae
manfid=0x2d0
#prodid=0x052e
nocrc=1
otpimagesize=502
xtalfreq=37400
extpagain2g=2
pdetrange2g=2
extpagain5g=2
pdetrange5g=2
rxgains2gelnagaina0=2
rxgains2gtrisoa0=6
rxgains2gtrelnabypa0=1
rxgains5gelnagaina0=4
rxgains5gtrisoa0=4
rxgains5gtrelnabypa0=1
rxchain=1
txchain=1
aa2g=1
aa5g=1
tssipos5g=0
tssipos2g=0
pa2ga0=0xff5c,0x1914,0xfd11
pa2gccka0=0xff78,0x1cf7,0xfcac
pa5ga0=0xff58,0x16dc,0xfd45,0xff61,0x16dc,0xfd44,0xff5d,0x165d,0xfd49,0xff5b,0x15a6,0xfd69
pa5gbw40a0=0xff62,0x17aa,0xfd30,0xff65,0x17cf,0xfd2f,0xff64,0x1747,0xfd33,0xff60,0x16b8,0xfd54
pa5gbw80a0=0xff5e,0x1740,0xfd3f,0xff5b,0x16e8,0xfd3d,0xff54,0x1654,0xfd42,0xff58,0x1614,0xfd60
#pa5ga0=0xff58,0x16ec,0xfd45,0xff61,0x170c,0xfd44,0xff5d,0x16dd,0xfd49,0xff5b,0x1616,0xfd69
#pa5gbw40a0=0xff62,0x16ca,0xfd30,0xff65,0x16bf,0xfd2f,0xff64,0x1687,0xfd33,0xff60,0x15d8,0xfd54
#pa5gbw80a0=0xff5e,0x1640,0xfd3f,0xff5b,0x1638,0xfd3d,0xff54,0x15b4,0xfd42,0xff58,0x1534,0xfd60
# Default Target Power for 2G -- 17dBm(11)/14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
maxp2ga0=74
maxp5ga0=74,74,74,74
cckbw202gpo=0x0000
cckbw20ul2gpo=0x0000
mcsbw202gpo=0xaa888888
mcsbw402gpo=0xaa888888
dot11agofdmhrbw202gpo=0x6666
ofdmlrbw202gpo=0x0066
tssifloor2g=500
# Default Target Power for 5G -- 14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
mcsbw205glpo=0xaa888888
mcsbw405glpo=0xaa888888
mcsbw805glpo=0xaa888888
mcsbw205gmpo=0xaa888888
mcsbw405gmpo=0xaa888888
mcsbw805gmpo=0xaa888888
mcsbw205ghpo=0xaa888888
mcsbw405ghpo=0xaa888888
mcsbw805ghpo=0xaa888888
mcslr5glpo=0x0000
mcslr5gmpo=0x0000
mcslr5ghpo=0x0000
sb20in40hrpo=0x0
sb20in80and160hr5glpo=0x0
sb40and80hr5glpo=0x0
sb20in80and160hr5gmpo=0x0
sb40and80hr5gmpo=0x0
sb20in80and160hr5ghpo=0x0
sb40and80hr5ghpo=0x0
sb20in40lrpo=0x0
sb20in80and160lr5glpo=0x0
sb40and80lr5glpo=0x0
sb20in80and160lr5gmpo=0x0
sb40and80lr5gmpo=0x0
sb20in80and160lr5ghpo=0x0
sb40and80lr5ghpo=0x0
dot11agduphrpo=0x0
dot11agduplrpo=0x0
phycal_tempdelta=25
cckdigfilttype=2
swctrlmap_5g=0x00080008,0x00500010,0x00100008,0x000000,0x078
swctrlmap_2g=0x00010001,0x00220002,0x00020001,0x042202,0x1ff
swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
#
# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line. 
muxenab=0x10
#sd_gpout=0
#sd_oobonly=1
#
rssicorrnorm_c0=-2,0
rssicorrnorm5g_c0=3,5,2,3,4,2,2,3,1,2,3,1
## ED threshold level to address the new ETSI requirement - 10/31/2013
ed_thresh2g=-77
ed_thresh5g=-77
#
paparambwver=1
