soc_info: Split sid_addr into sid_base + sid_offset

This is a preparatory step. Instead of using memory-based access,
we might want to retrieve SID keys (e-fuses) via SID registers.
For this, it's convenient if the plain base address is available.
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>

fel.c

@@ -279,11 +279,12 @@ void fel_writel(feldev_handle *dev, uint32_t addr, uint32_t val)
 void aw_fel_print_sid(feldev_handle *dev)
 {
 	soc_info_t *soc_info = dev->soc_info;
-	if (soc_info->sid_addr) {
-		pr_info("SID key (e-fuses) at 0x%08X\n", soc_info->sid_addr);
+	if (soc_info->sid_base) {
+		uint32_t sid_addr = soc_info->sid_base + soc_info->sid_offset;
+		pr_info("SID key (e-fuses) at 0x%08X\n", sid_addr);
 
 		uint32_t key[4];
-		fel_readl_n(dev, soc_info->sid_addr, key, 4);
+		fel_readl_n(dev, sid_addr, key, 4);
 
 		unsigned int i;
 		/* output SID in "xxxxxxxx:xxxxxxxx:xxxxxxxx:xxxxxxxx" format */

fel_lib.c

@@ -601,8 +601,10 @@ feldev_list_entry *list_fel_devices(size_t *count)
 		strncpy(entry->soc_name, dev->soc_name, sizeof(soc_name_t));
 
 		/* retrieve SID bits */
-		if (dev->soc_info->sid_addr)
-			aw_fel_readl_n(dev, dev->soc_info->sid_addr, entry->SID, 4);
+		if (dev->soc_info->sid_base)
+			aw_fel_readl_n(dev,
+				dev->soc_info->sid_base + dev->soc_info->sid_offset,
+				entry->SID, 4);
 
 		feldev_close(dev);
 		free(dev);

soc_info.c

@@ -102,7 +102,7 @@ soc_info_t soc_info_table[] = {
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
 		.needs_l2en   = true,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1625, /* Allwinner A10s, A13, R8 */
 		.name         = "A13",
@@ -110,21 +110,21 @@ soc_info_t soc_info_table[] = {
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
 		.needs_l2en   = true,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1651, /* Allwinner A20 */
 		.name         = "A20",
 		.scratch_addr = 0x1000,
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1650, /* Allwinner A23 */
 		.name         = "A23",
 		.scratch_addr = 0x1000,
 		.thunk_addr   = 0x46E00, .thunk_size = 0x200,
 		.swap_buffers = ar100_abusing_sram_swap_buffers,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1633, /* Allwinner A31 */
 		.name         = "A31",
@@ -137,7 +137,7 @@ soc_info_t soc_info_table[] = {
 		.scratch_addr = 0x1000,
 		.thunk_addr   = 0x46E00, .thunk_size = 0x200,
 		.swap_buffers = ar100_abusing_sram_swap_buffers,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1689, /* Allwinner A64 */
 		.name         = "A64",
@@ -145,7 +145,8 @@ soc_info_t soc_info_table[] = {
 		.scratch_addr = 0x11000,
 		.thunk_addr   = 0x1A200, .thunk_size = 0x200,
 		.swap_buffers = a64_sram_swap_buffers,
-		.sid_addr     = 0x01C14200,
+		.sid_base     = 0x01C14000,
+		.sid_offset   = 0x200,
 		.rvbar_reg    = 0x017000A0,
 	},{
 		.soc_id       = 0x1639, /* Allwinner A80 */
@@ -154,14 +155,16 @@ soc_info_t soc_info_table[] = {
 		.scratch_addr = 0x11000,
 		.thunk_addr   = 0x23400, .thunk_size = 0x200,
 		.swap_buffers = a80_sram_swap_buffers,
-		.sid_addr     = 0x01c0e200,
+		.sid_base     = 0X01C0E000,
+		.sid_offset   = 0x200,
 	},{
 		.soc_id       = 0x1673, /* Allwinner A83T */
 		.name         = "A83T",
 		.scratch_addr = 0x1000,
 		.thunk_addr   = 0x46E00, .thunk_size = 0x200,
 		.swap_buffers = ar100_abusing_sram_swap_buffers,
-		.sid_addr     = 0x01C14200,
+		.sid_base     = 0x01C14000,
+		.sid_offset   = 0x200,
 	},{
 		.soc_id       = 0x1680, /* Allwinner H3, H2+ */
 		.name         = "H3",
@@ -169,7 +172,8 @@ soc_info_t soc_info_table[] = {
 		.mmu_tt_addr  = 0x8000,
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
-		.sid_addr     = 0x01C14200,
+		.sid_base     = 0x01C14000,
+		.sid_offset   = 0x200,
 	},{
 		.soc_id       = 0x1681, /* Allwinner V3s */
 		.name         = "V3s",
@@ -177,7 +181,7 @@ soc_info_t soc_info_table[] = {
 		.mmu_tt_addr  = 0x8000,
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
-		.sid_addr     = 0x01C23800,
+		.sid_base     = 0x01C23800,
 	},{
 		.soc_id       = 0x1718, /* Allwinner H5 */
 		.name         = "H5",
@@ -185,7 +189,8 @@ soc_info_t soc_info_table[] = {
 		.scratch_addr = 0x11000,
 		.thunk_addr   = 0x1A200, .thunk_size = 0x200,
 		.swap_buffers = a64_sram_swap_buffers,
-		.sid_addr     = 0x01C14200,
+		.sid_base     = 0x01C14000,
+		.sid_offset   = 0x200,
 		.rvbar_reg    = 0x017000A0,
 	},{
 		.soc_id       = 0x1701, /* Allwinner R40 */
@@ -193,7 +198,8 @@ soc_info_t soc_info_table[] = {
 		.scratch_addr = 0x1000,
 		.thunk_addr   = 0xA200, .thunk_size = 0x200,
 		.swap_buffers = a10_a13_a20_sram_swap_buffers,
-		.sid_addr     = 0x01C1B200,
+		.sid_base     = 0x01C1B000,
+		.sid_offset   = 0x200,
 	},{
 		.swap_buffers = NULL /* End of the table */
 	}

soc_info.h

@@ -82,7 +82,8 @@ typedef struct {
 	uint32_t           thunk_size;   /* Maximal size of the thunk code */
 	bool               needs_l2en;   /* Set the L2EN bit */
 	uint32_t           mmu_tt_addr;  /* MMU translation table address */
-	uint32_t           sid_addr;     /* base address for SID_KEY[0-3] registers */
+	uint32_t           sid_base;     /* base address for SID registers */
+	uint32_t           sid_offset;   /* offset for SID_KEY[0-3], "root key" */
 	uint32_t           rvbar_reg;    /* MMIO address of RVBARADDR0_L register */
 	sram_swap_buffers *swap_buffers;
 } soc_info_t;