Commit 9e7f3a3a authored by Siarhei Siamashka's avatar Siarhei Siamashka Committed by Bernhard Nortmann
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fel: Move the backup storage to the SRAM section A1 on H3



This allows the SRAM section A2 to be exclusively used by
the OpenRISC core.

There are no substantial differences between H3 and A10/A13/A20.
It just has 64 KiB of SRAM starting at the address 0x0 instead
of 48 KiB.
Signed-off-by: default avatarSiarhei Siamashka <siarhei.siamashka@gmail.com>
parent 55f36412
...@@ -574,9 +574,9 @@ soc_sram_info soc_sram_info_table[] = { ...@@ -574,9 +574,9 @@ soc_sram_info soc_sram_info_table[] = {
{ {
.soc_id = 0x1680, /* Allwinner H3 */ .soc_id = 0x1680, /* Allwinner H3 */
.scratch_addr = 0x1000, .scratch_addr = 0x1000,
.mmu_tt_addr = 0x44000, .mmu_tt_addr = 0x8000,
.thunk_addr = 0x46E00, .thunk_size = 0x200, .thunk_addr = 0xA200, .thunk_size = 0x200,
.swap_buffers = ar100_abusing_sram_swap_buffers, .swap_buffers = a10_a13_a20_sram_swap_buffers,
.sid_addr = 0x01C14200, .sid_addr = 0x01C14200,
}, },
{ {
......
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