fel: Add SOC ID, SRAM info and SID address for R40

The R40 is marketed as the successor to the A20. The SRAM layout is the
same as the A20, but there doesn't seem to be a secure SRAM block.

The SID block is at a completely different address. The layout is the
same as the newer SoCs, with the e-fuses at an offset of 0x200.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

fel.c

@@ -265,6 +265,7 @@ void aw_fel_print_version(libusb_device_handle *usb)
 	case 0x1667: soc_name="A33"; break;
 	case 0x1673: soc_name="A83T"; break;
 	case 0x1680: soc_name="H3"; break;
+	case 0x1701: soc_name="R40"; break;
 	case 0x1718: soc_name="H5"; break;
 	}
 

soc_info.c

@@ -167,6 +167,12 @@ soc_info_t soc_info_table[] = {
 		.swap_buffers = a64_sram_swap_buffers,
 		.sid_addr     = 0x01C14200,
 		.rvbar_reg    = 0x017000A0,
+	},{
+		.soc_id       = 0x1701, /* Allwinner R40 */
+		.scratch_addr = 0x1000,
+		.thunk_addr   = 0xA200, .thunk_size = 0x200,
+		.swap_buffers = a10_a13_a20_sram_swap_buffers,
+		.sid_addr     = 0x01C1B200,
 	},{
 		.swap_buffers = NULL /* End of the table */
 	}