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The exit code path after detecting that the cache is enabled does not
need to swap FEL stacks and backup buffers. This way we get the error
actually reported by the 'fel' tool instead of the device getting
locked up.

The thunk code refuses to work if the caches are enabled because
we don't want to deal with the instructions/data cache coherency
yet. The caches are initially in a disabled state upon activating
FEL mode on all currently known Allwinner processors.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>

A cross-binutils is generally a bit easier to get hold of, and in particular
binutils-none-eabi (and binutils-arm-linux-gnueabi{,hf}) are available in
Debian Jessie while the equivalent cross gcc is not.

The only reason gcc/cpp are required are to strip the embedded Ruby code out
before handing to the assembler, we can achieve the same by opening a multiline
comment around the ruby instead. Care needs to be taken not to close the
comment prematurely hence "*/" is written in the one place it is used as
"\x2a/" (i.e. encoding the * in hex). Having done this we can pass the .S file
directly to the cross-as.

There is no change to the resulting header file.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>

Now it is possible to load and execute the same U-Boot SPL,
as used for booting from SD cards. Just a different delivery
method (a USB OTG cable instead of an SD card) for handling
exactly the same content.

The only argument for this new command is the name of the SPL
binary file (with a eGON header generated by the 'mksunxiboot'
tool). Now the 'fel' tool can be run as:

    fel spl u-boot-sunxi-with-spl.bin

Before this change, the SPL was only able to use the memory between
addresses 0x2000 and ~0x5D00, totalling to something like ~15 KiB.
This is the biggest contiguous area in SRAM, which is not used
by the FEL code from the BROM. Unfortunately, it is rather small.
And also the unusual starting offset was making it difficult to
use the same SPL binary for booting from the SD card and via FEL.

There are surely more unused parts of SRAM, but they are scattered
across multiple locations, primarily because the FEL code from the
BROM sets up two stacks at inconvenient locations (the IRQ handler
stack at 0x2000, and a regular stack at 0x7000). Essentially, the
problem to solve here is to ensure a sufficiently large and consistent
SRAM address space for the SPL without any potentially SoC specific
holes in the case of booting over USB via FEL.

This is achieved by injecting special entry/exit thunk code, which
is moving the data in SRAM to provide a contiguous space for the SPL
at the beginning of SRAM, while still preserving the the data from
the BROM elsewhere. When the SPL tries to return control back to the
FEL code in the BROM, the thunk code moves the data back to its
original place. Additionally, the eGON checksum is verified to
ensure that no data corruption has happened due to some unexpected
clash with the FEL protocol code from the BROM.

So the thunk code takes care of the address space allocation uglyness
and provides the U-Boot SPL with a somewhat nicer abstraction.
Now the FEL booted SPL on A10/A13/A20/A31 can use up to 32 KiB of
SRAM because the BROM data is saved to different SRAM section.
There is also generic code, which does not rely on extra SRAM
sections, but just glues together the unused free space from
both BROM FEL stacks to provide something like ~21 KiB to the SPL.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>