juno_common.c 2.84 KB
Newer Older
1
/*
2
 * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
3
 *
dp-arm's avatar
dp-arm committed
4
 * SPDX-License-Identifier: BSD-3-Clause
5
 */
6

7
#include <lib/smccc.h>
8
#include <platform_def.h>
9
10
#include <services/arm_arch_svc.h>

11
#include <plat/arm/common/plat_arm.h>
12
13

/*
14
 * Table of memory regions for different BL stages to map using the MMU.
15
16
 * This doesn't include Trusted SRAM as setup_page_tables() already takes care
 * of mapping it.
17
 */
18
#ifdef IMAGE_BL1
19
20
const mmap_region_t plat_arm_mmap[] = {
	ARM_MAP_SHARED_RAM,
21
	V2M_MAP_FLASH0_RW,
22
23
24
	V2M_MAP_IOFPGA,
	CSS_MAP_DEVICE,
	SOC_CSS_MAP_DEVICE,
25
#if TRUSTED_BOARD_BOOT
26
	/* Map DRAM to authenticate NS_BL2U image. */
27
28
	ARM_MAP_NS_DRAM1,
#endif
29
30
31
	{0}
};
#endif
32
#ifdef IMAGE_BL2
33
34
const mmap_region_t plat_arm_mmap[] = {
	ARM_MAP_SHARED_RAM,
35
	V2M_MAP_FLASH0_RW,
36
37
38
#ifdef PLAT_ARM_MEM_PROT_ADDR
	ARM_V2M_MAP_MEM_PROTECT,
#endif
39
40
41
42
	V2M_MAP_IOFPGA,
	CSS_MAP_DEVICE,
	SOC_CSS_MAP_DEVICE,
	ARM_MAP_NS_DRAM1,
43
#ifdef __aarch64__
44
45
	ARM_MAP_DRAM2,
#endif
46
#ifdef SPD_tspd
47
	ARM_MAP_TSP_SEC_MEM,
48
#endif
49
#ifdef SPD_opteed
50
	ARM_MAP_OPTEE_CORE_MEM,
51
	ARM_OPTEE_PAGEABLE_LOAD_MEM,
52
53
54
#endif
#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
	ARM_MAP_BL1_RW,
55
#endif
56
57
58
	{0}
};
#endif
59
#ifdef IMAGE_BL2U
60
61
62
const mmap_region_t plat_arm_mmap[] = {
	ARM_MAP_SHARED_RAM,
	CSS_MAP_DEVICE,
63
64
	CSS_MAP_SCP_BL2U,
	V2M_MAP_IOFPGA,
65
66
67
68
	SOC_CSS_MAP_DEVICE,
	{0}
};
#endif
69
#ifdef IMAGE_BL31
70
71
72
73
const mmap_region_t plat_arm_mmap[] = {
	ARM_MAP_SHARED_RAM,
	V2M_MAP_IOFPGA,
	CSS_MAP_DEVICE,
74
75
76
#ifdef PLAT_ARM_MEM_PROT_ADDR
	ARM_V2M_MAP_MEM_PROTECT,
#endif
77
	SOC_CSS_MAP_DEVICE,
78
	ARM_DTB_DRAM_NS,
79
80
81
	{0}
};
#endif
82
#ifdef IMAGE_BL32
83
const mmap_region_t plat_arm_mmap[] = {
84
#ifndef __aarch64__
85
	ARM_MAP_SHARED_RAM,
86
87
88
#ifdef PLAT_ARM_MEM_PROT_ADDR
	ARM_V2M_MAP_MEM_PROTECT,
#endif
89
#endif
90
91
92
93
94
95
96
97
	V2M_MAP_IOFPGA,
	CSS_MAP_DEVICE,
	SOC_CSS_MAP_DEVICE,
	{0}
};
#endif

ARM_CASSERT_MMAP
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134

/*****************************************************************************
 * plat_is_smccc_feature_available() - This function checks whether SMCCC
 *                                     feature is availabile for platform.
 * @fid: SMCCC function id
 *
 * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
 * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
 *****************************************************************************/
int32_t plat_is_smccc_feature_available(u_register_t fid)
{
	switch (fid) {
	case SMCCC_ARCH_SOC_ID:
		return SMC_ARCH_CALL_SUCCESS;
	default:
		return SMC_ARCH_CALL_NOT_SUPPORTED;
	}
}

/* Get SOC version */
int32_t plat_get_soc_version(void)
{
	return (int32_t)
		((ARM_SOC_IDENTIFICATION_CODE << ARM_SOC_IDENTIFICATION_SHIFT)
		 | (ARM_SOC_CONTINUATION_CODE << ARM_SOC_CONTINUATION_SHIFT)
		 | JUNO_SOC_ID);
}

/* Get SOC revision */
int32_t plat_get_soc_revision(void)
{
	unsigned int sys_id;

	sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID);
	return (int32_t)((sys_id >> V2M_SYS_ID_REV_SHIFT) &
			V2M_SYS_ID_REV_MASK);
}