plat.ld.S 2.02 KB
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/*
 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
 *
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 * SPDX-License-Identifier: BSD-3-Clause
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 */
#ifndef __ROCKCHIP_PLAT_LD_S__
#define __ROCKCHIP_PLAT_LD_S__

MEMORY {
    SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE
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    PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
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}

SECTIONS
{
	. = SRAM_BASE;
	ASSERT(. == ALIGN(4096),
		"SRAM_BASE address is not aligned on a page boundary.")

	/*
	 * The SRAM space allocation for RK3399
	 * ----------------
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	 * | m0 code bin
	 * ----------------
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	 * | sram text
	 * ----------------
	 * | sram data
	 * ----------------
	 */
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	.incbin_sram : ALIGN(4096) {
		__sram_incbin_start = .;
		*(.sram.incbin)
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		 __sram_incbin_real_end = .;
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		. = ALIGN(4096);
		__sram_incbin_end = .;
	} >SRAM
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	ASSERT((__sram_incbin_real_end - __sram_incbin_start) <=
		SRAM_BIN_LIMIT, ".incbin_sram has exceeded its limit")
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	.text_sram : ALIGN(4096) {
		__bl31_sram_text_start = .;
		*(.sram.text)
		*(.sram.rodata)
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		__bl31_sram_text_real_end = .;
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		. = ALIGN(4096);
		__bl31_sram_text_end = .;
	} >SRAM
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	ASSERT((__bl31_sram_text_real_end - __bl31_sram_text_start) <=
		SRAM_TEXT_LIMIT, ".text_sram has exceeded its limit")
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	.data_sram : ALIGN(4096) {
		__bl31_sram_data_start = .;
		*(.sram.data)
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		__bl31_sram_data_real_end = .;
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		. = ALIGN(4096);
		__bl31_sram_data_end = .;
	} >SRAM
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	ASSERT((__bl31_sram_data_real_end - __bl31_sram_data_start) <=
		SRAM_DATA_LIMIT, ".data_sram has exceeded its limit")
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	.stack_sram : ALIGN(4096) {
		__bl31_sram_stack_start = .;
		. += 4096;
		__bl31_sram_stack_end = .;
	} >SRAM

	. = PMUSRAM_BASE;

	/*
	 * pmu_cpuson_entrypoint request address
	 * align 64K when resume, so put it in the
	 * start of pmusram
	 */
	.pmusram : {
		ASSERT(. == ALIGN(64 * 1024),
			".pmusram.entry request 64K aligned.");
		*(.pmusram.entry)
		__bl31_pmusram_text_start = .;
		*(.pmusram.text)
		*(.pmusram.rodata)
		__bl31_pmusram_text_end = .;
		__bl31_pmusram_data_start = .;
		*(.pmusram.data)
		__bl31_pmusram_data_end = .;

	} >PMUSRAM
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}

#endif /* __ROCKCHIP_PLAT_LD_S__ */