arm_common.mk 9.59 KB
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#
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# Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#

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ifeq (${ARCH}, aarch64)
  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
  # DRAM (if available) or the TZC secured area of DRAM.
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  # TZC secured DRAM is the default.
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  ARM_TSP_RAM_LOCATION	?=	dram
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  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
  else
    $(error "Unsupported ARM_TSP_RAM_LOCATION value")
  endif
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  # Process flags
  # Process ARM_BL31_IN_DRAM flag
  ARM_BL31_IN_DRAM		:=	0
  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
  $(eval $(call add_define,ARM_BL31_IN_DRAM))
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else
  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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endif
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$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))


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# For the original power-state parameter format, the State-ID can be encoded
# according to the recommended encoding or zero. This flag determines which
# State-ID encoding to be parsed.
ARM_RECOM_STATE_ID_ENC := 0

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# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
# be set. Else throw a build error.
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ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
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    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
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  endif
endif

# Process ARM_RECOM_STATE_ID_ENC flag
$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))

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# Process ARM_DISABLE_TRUSTED_WDOG flag
# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
ARM_DISABLE_TRUSTED_WDOG	:=	0
ifeq (${SPIN_ON_BL1_EXIT}, 1)
ARM_DISABLE_TRUSTED_WDOG	:=	1
endif
$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))

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# Process ARM_CONFIG_CNTACR
ARM_CONFIG_CNTACR		:=	1
$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
$(eval $(call add_define,ARM_CONFIG_CNTACR))

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# Process ARM_BL31_IN_DRAM flag
ARM_BL31_IN_DRAM		:=	0
$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
$(eval $(call add_define,ARM_BL31_IN_DRAM))

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# Process ARM_PLAT_MT flag
ARM_PLAT_MT			:=	0
$(eval $(call assert_boolean,ARM_PLAT_MT))
$(eval $(call add_define,ARM_PLAT_MT))

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# Use translation tables library v2 by default
ARM_XLAT_TABLES_LIB_V1		:=	0
$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))

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# Don't have the Linux kernel as a BL33 image by default
ARM_LINUX_KERNEL_AS_BL33	:=	0
$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))

ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
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  ifeq (${ARCH},aarch64)
    ifneq (${RESET_TO_BL31},1)
      $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.")
    endif
  else
    ifneq (${RESET_TO_SP_MIN},1)
      $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
    endif
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  endif
  ifndef PRELOADED_BL33_BASE
    $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
  endif
  ifndef ARM_PRELOADED_DTB_BASE
    $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
  endif
  $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
endif

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# Use an implementation of SHA-256 with a smaller memory footprint but reduced
# speed.
$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))

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# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
# in the FIP if the platform requires.
ifneq ($(BL32_EXTRA1),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
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endif
ifneq ($(BL32_EXTRA2),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
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endif

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# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
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ENABLE_PSCI_STAT		:=	1
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ENABLE_PMF			:=	1
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# On ARM platforms, separate the code and read-only data sections to allow
# mapping the former as executable and the latter as execute-never.
SEPARATE_CODE_AND_RODATA	:=	1

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# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
# and NOBITS sections of BL31 image are adjacent to each other and loaded
# into Trusted SRAM.
SEPARATE_NOBITS_REGION		:=	0

# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
# the build to require that ARM_BL31_IN_DRAM is enabled as well.
ifeq ($(SEPARATE_NOBITS_REGION),1)
    ifneq ($(ARM_BL31_IN_DRAM),1)
         $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
    endif
    ifneq ($(RECLAIM_INIT_CODE),0)
          $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
    endif
endif

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# Disable ARM Cryptocell by default
ARM_CRYPTOCELL_INTEG		:=	0
$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))

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# Enable PIE support for RESET_TO_BL31 case
ifeq (${RESET_TO_BL31},1)
    ENABLE_PIE			:=	1
endif

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# CryptoCell integration relies on coherent buffers for passing data from
# the AP CPU to the CryptoCell
ifeq (${ARM_CRYPTOCELL_INTEG},1)
    ifeq (${USE_COHERENT_MEM},0)
        $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
    endif
endif

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ifeq (${ARCH}, aarch64)
PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
endif
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PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
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				plat/arm/common/arm_common.c			\
				plat/arm/common/arm_console.c
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ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
PLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/xlat_tables_common.c		\
				lib/xlat_tables/${ARCH}/xlat_tables.c
else
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include lib/xlat_tables_v2/xlat_tables.mk

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PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
endif
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BL1_SOURCES		+=	drivers/io/io_fip.c				\
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				drivers/io/io_memmap.c				\
				drivers/io/io_storage.c				\
				plat/arm/common/arm_bl1_setup.c			\
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				plat/arm/common/arm_err.c			\
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				plat/arm/common/arm_io_storage.c
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ifdef EL3_PAYLOAD_BASE
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# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
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# their holding pen
BL1_SOURCES		+=	plat/arm/common/arm_pm.c
endif
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BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
				drivers/delay_timer/generic_delay_timer.c	\
				drivers/io/io_fip.c				\
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				drivers/io/io_memmap.c				\
				drivers/io/io_storage.c				\
				plat/arm/common/arm_bl2_setup.c			\
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				plat/arm/common/arm_err.c			\
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				plat/arm/common/arm_io_storage.c
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# Add `libfdt` and Arm common helpers required for Dynamic Config
include lib/libfdt/libfdt.mk
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DYN_CFG_SOURCES		+=	plat/arm/common/arm_dyn_cfg.c		\
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				plat/arm/common/arm_dyn_cfg_helpers.c	\
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				common/fdt_wrappers.c
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BL1_SOURCES		+=	${DYN_CFG_SOURCES}
BL2_SOURCES		+=	${DYN_CFG_SOURCES}

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ifeq (${BL2_AT_EL3},1)
BL2_SOURCES		+=	plat/arm/common/arm_bl2_el3_setup.c
endif

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# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
# the AArch32 descriptors.
ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
else
BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
endif
BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
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				common/desc_image_load.c
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ifeq (${SPD},opteed)
BL2_SOURCES		+=	lib/optee/optee_utils.c
endif
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BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
				drivers/delay_timer/generic_delay_timer.c	\
				plat/arm/common/arm_bl2u_setup.c
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BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
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				plat/arm/common/arm_pm.c			\
				plat/arm/common/arm_topology.c			\
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				plat/common/plat_psci_common.c
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ifeq (${ENABLE_PMF}, 1)
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ifeq (${ARCH}, aarch64)
BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
				plat/arm/common/arm_sip_svc.c			\
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				lib/pmf/pmf_smc.c
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else
BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
				lib/pmf/pmf_smc.c
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endif
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
BL31_SOURCES		+=	plat/arm/common/aarch64/arm_ehf.c
endif

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ifeq (${SDEI_SUPPORT},1)
BL31_SOURCES		+=	plat/arm/common/aarch64/arm_sdei.c
endif

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# RAS sources
ifeq (${RAS_EXTENSION},1)
BL31_SOURCES		+=	lib/extensions/ras/std_err_record.c		\
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				lib/extensions/ras/ras_common.c
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endif

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# Pointer Authentication sources
ifeq (${ENABLE_PAUTH}, 1)
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PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c	\
				lib/extensions/pauth/pauth_helpers.S
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endif

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ifeq (${SPD},spmd)
BL31_SOURCES		+=	plat/common/plat_spmd_manifest.c	\
				common/fdt_wrappers.c			\
				${LIBFDT_SRCS}

endif

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ifneq (${TRUSTED_BOARD_BOOT},0)

    # Include common TBB sources
    AUTH_SOURCES	:=	drivers/auth/auth_mod.c				\
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				drivers/auth/crypto_mod.c			\
				drivers/auth/img_parser_mod.c			\
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    # Include the selected chain of trust sources.
    ifeq (${COT},tbbr)
        AUTH_SOURCES	+=	drivers/auth/tbbr/tbbr_cot.c
    else
        $(error Unknown chain of trust ${COT})
    endif
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    BL1_SOURCES		+=	${AUTH_SOURCES}					\
				bl1/tbbr/tbbr_img_desc.c			\
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				plat/arm/common/arm_bl1_fwu.c			\
				plat/common/tbbr/plat_tbbr.c
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    BL2_SOURCES		+=	${AUTH_SOURCES}					\
				plat/common/tbbr/plat_tbbr.c
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    $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
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    # We expect to locate the *.mk files under the directories specified below
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ifeq (${ARM_CRYPTOCELL_INTEG},0)
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    CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
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else
    CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
endif
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    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk

    $(info Including ${CRYPTO_LIB_MK})
    include ${CRYPTO_LIB_MK}

    $(info Including ${IMG_PARSER_LIB_MK})
    include ${IMG_PARSER_LIB_MK}

endif
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ifeq (${RECLAIM_INIT_CODE}, 1)
    ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
        $(error "To reclaim init code xlat tables v2 must be used")
    endif
endif