sgm-common.mk 2.18 KB
Newer Older
1
#
2
# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3
4
5
6
#
# SPDX-License-Identifier: BSD-3-Clause
#

7
8
CSS_USE_SCMI_SDS_DRIVER	:=	1

9
10
11
12
13
14
15
16
CSS_SGM_BASE		:=	plat/arm/css/sgm

PLAT_INCLUDES		:=	-I${CSS_SGM_BASE}/include

PLAT_BL_COMMON_SOURCES	:=	${CSS_SGM_BASE}/sgm_mmap_config.c	\
				${CSS_SGM_BASE}/aarch64/css_sgm_helpers.S

SECURITY_SOURCES	:=	drivers/arm/tzc/tzc_dmc500.c		\
Ambroise Vincent's avatar
Ambroise Vincent committed
17
				plat/arm/common/arm_tzc_dmc500.c	\
18
19
20
21
22
23
24
25
26
27
				${CSS_SGM_BASE}/sgm_security.c

SGM_CPU_SOURCES		:=	lib/cpus/aarch64/cortex_a55.S		\
				lib/cpus/aarch64/cortex_a75.S

INTERCONNECT_SOURCES	:=	${CSS_SGM_BASE}/sgm_interconnect.c

SGM_GIC_SOURCES		:=	drivers/arm/gic/common/gic_common.c	\
				drivers/arm/gic/v3/gicv3_main.c		\
				drivers/arm/gic/v3/gicv3_helpers.c	\
28
29
				drivers/arm/gic/v3/gicdv3_helpers.c	\
				drivers/arm/gic/v3/gicrv3_helpers.c	\
30
31
32
33
34
35
36
				plat/common/plat_gicv3.c		\
				plat/arm/common/arm_gicv3.c		\
				drivers/arm/gic/v3/gic600.c		\
				drivers/arm/gic/v3/arm_gicv3_common.c

BL1_SOURCES		+=	$(SGM_CPU_SOURCES)			\
				${INTERCONNECT_SOURCES}			\
Ambroise Vincent's avatar
Ambroise Vincent committed
37
				${CSS_SGM_BASE}/sgm_bl1_setup.c		\
38
39
				${CSS_SGM_BASE}/sgm_plat_config.c	\
				drivers/arm/sp805/sp805.c
40

Ambroise Vincent's avatar
Ambroise Vincent committed
41
42
BL2_SOURCES		+=	${SECURITY_SOURCES}			\
				${CSS_SGM_BASE}/sgm_plat_config.c
43
44
45
46
47
48
49

BL2U_SOURCES		+=	${SECURITY_SOURCES}

BL31_SOURCES		+=	$(SGM_CPU_SOURCES)			\
				${INTERCONNECT_SOURCES}			\
				${SECURITY_SOURCES}			\
				${SGM_GIC_SOURCES}			\
Ambroise Vincent's avatar
Ambroise Vincent committed
50
				${CSS_SGM_BASE}/sgm_topology.c		\
51
52
53
				${CSS_SGM_BASE}/sgm_bl31_setup.c	\
				${CSS_SGM_BASE}/sgm_plat_config.c

54
ifneq (${RESET_TO_BL31},0)
55
  $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
56
57
58
  Please set RESET_TO_BL31 to 0.")
endif

59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
# sgm uses CCI-500 as Cache Coherent Interconnect
ARM_CCI_PRODUCT_ID	:=	500

# System coherency is managed in hardware
HW_ASSISTED_COHERENCY	:=	1

# When building for systems with hardware-assisted coherency, there's no need to
# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
USE_COHERENT_MEM	:=	0

override ARM_PLAT_MT	:=	1

$(eval $(call add_define,SGM_PLAT))

include plat/arm/common/arm_common.mk
include plat/arm/board/common/board_common.mk
include plat/arm/css/common/css_common.mk
include plat/arm/soc/common/soc_css.mk