stm32mp_common.h 2.97 KB
Newer Older
1
/*
2
 * Copyright (C) 2018-2020, STMicroelectronics - All Rights Reserved
3
4
5
6
7
8
9
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef STM32MP_COMMON_H
#define STM32MP_COMMON_H

10
11
#include <stdbool.h>

12
13
#include <platform_def.h>

14
/* Functions to save and get boot context address given by ROM code */
15
16
void stm32mp_save_boot_ctx_address(uintptr_t address);
uintptr_t stm32mp_get_boot_ctx_address(void);
17

18
bool stm32mp_is_single_core(void);
19
bool stm32mp_is_closed_device(void);
20

21
22
23
24
25
26
27
28
29
30
31
32
/* Return the base address of the DDR controller */
uintptr_t stm32mp_ddrctrl_base(void);

/* Return the base address of the DDR PHY */
uintptr_t stm32mp_ddrphyc_base(void);

/* Return the base address of the PWR peripheral */
uintptr_t stm32mp_pwr_base(void);

/* Return the base address of the RCC peripheral */
uintptr_t stm32mp_rcc_base(void);

33
34
35
/* Check MMU status to allow spinlock use */
bool stm32mp_lock_available(void);

Yann Gautier's avatar
Yann Gautier committed
36
37
38
39
40
41
42
43
44
45
46
/* Get IWDG platform instance ID from peripheral IO memory base address */
uint32_t stm32_iwdg_get_instance(uintptr_t base);

/* Return bitflag mask for expected IWDG configuration from OTP content */
uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst);

#if defined(IMAGE_BL2)
/* Update OTP shadow registers with IWDG configuration from device tree */
uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags);
#endif

47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
/*
 * Platform util functions for the GPIO driver
 * @bank: Target GPIO bank ID as per DT bindings
 *
 * Platform shall implement these functions to provide to stm32_gpio
 * driver the resource reference for a target GPIO bank. That are
 * memory mapped interface base address, interface offset (see below)
 * and clock identifier.
 *
 * stm32_get_gpio_bank_offset() returns a bank offset that is used to
 * check DT configuration matches platform implementation of the banks
 * description.
 */
uintptr_t stm32_get_gpio_bank_base(unsigned int bank);
unsigned long stm32_get_gpio_bank_clock(unsigned int bank);
uint32_t stm32_get_gpio_bank_offset(unsigned int bank);

64
65
66
/* Print CPU information */
void stm32mp_print_cpuinfo(void);

67
68
69
/* Print board information */
void stm32mp_print_boardinfo(void);

70
71
72
73
74
/*
 * Util for clock gating and to get clock rate for stm32 and platform drivers
 * @id: Target clock ID, ID used in clock DT bindings
 */
bool stm32mp_clk_is_enabled(unsigned long id);
Yann Gautier's avatar
Yann Gautier committed
75
76
void stm32mp_clk_enable(unsigned long id);
void stm32mp_clk_disable(unsigned long id);
77
78
unsigned long stm32mp_clk_get_rate(unsigned long id);

79
/* Initialise the IO layer and register platform IO devices */
80
void stm32mp_io_setup(void);
81

82
83
84
85
86
87
88
89
/*
 * Check that the STM32 header of a .stm32 binary image is valid
 * @param header: pointer to the stm32 image header
 * @param buffer: address of the binary image (payload)
 * @return: 0 on success, negative value in case of error
 */
int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer);

90
91
92
93
/* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */
int stm32mp_map_ddr_non_cacheable(void);
int stm32mp_unmap_ddr(void);

94
#endif /* STM32MP_COMMON_H */