• Varun Wadekar's avatar
    Tegra: memctrl_v1: disable AHB redirection after cold boot · 0c2276e3
    Varun Wadekar authored
    
    During boot, USB3 and flash media (SDMMC/SATA) devices need access to
    IRAM. Because these clients connect to the MC and do not have a direct
    path to the IRAM, the MC implements AHB redirection during boot to allow
    path to IRAM. In this mode, accesses to a programmed memory address aperture
    are directed to the AHB bus, allowing access to the IRAM. The AHB aperture
    is defined by the IRAM_BASE_LO and IRAM_BASE_HI registers, which are
    initialized to disable this aperture. Once bootup is complete, we must
    program IRAM base/top, thus disabling access to IRAM.
    
    This patch provides functionality to disable this access. The tegra port
    calls this new function before jumping to the non-secure world during
    cold boot.
    Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
    0c2276e3
memctrl.h 1.95 KB
/*
 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * Neither the name of ARM nor the names of its contributors may be used
 * to endorse or promote products derived from this software without specific
 * prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __MEMCTRL_H__
#define __MEMCTRL_H__

void tegra_memctrl_setup(void);
void tegra_memctrl_restore_settings(void);
void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes);
void tegra_memctrl_tzram_setup(uint64_t phys_base, uint32_t size_in_bytes);
void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
void tegra_memctrl_disable_ahb_redirection(void);

#endif /* __MEMCTRL_H__ */