• Chandni Cherukuri's avatar
    sgi: disable CPU power down bit in reset handler · 8e1cc449
    Chandni Cherukuri authored
    
    
    On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1'
    register requires an explicit write to clear it for hotplug and
    idle to function correctly. The reset value of this bit is zero
    but it still requires this explicit clear to zero. This indicates
    that this could be a model related issue but for now this issue can
    be fixed be clearing the CORE_PWRDN_EN in the platform specific
    reset handler function.
    
    Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19
    Signed-off-by: default avatarChandni Cherukuri <chandni.cherukuri@arm.com>
    8e1cc449
sgi_helper.S 2.94 KB