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Sandrine Bailleux authored
Alignment fault checking is always enabled in TF (by setting the SCTLR.A bit). Thus, all instructions that load or store one or more registers have an alignment check that the address being accessed is aligned to the size of the data element(s) being accessed. If this check fails it causes an Alignment fault, which is taken as a Data Abort exception. The compiler needs to be aware that it must not emit load and store instructions resulting in unaligned accesses. It already is for AArch64 builds (see commit fa1d3712 "Add -mstrict-align to the gcc options"), this patch does the same for AArch32 builds. Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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