• Marvin Hsu's avatar
    Tegra210B01: SE1 and SE2/PKA1 context save (atomic) · ce3c97c9
    Marvin Hsu authored
    
    
    This patch adds the implementation of the SE atomic context save
    sequence. The atomic context-save consistently saves to the TZRAM
    carveout; thus there is no need to declare context save buffer or
    map MMU region in TZRAM for context save. The atomic context-save
    routine is responsible to validate the context-save progress
    counter, where CTX_SAVE_CNT=133(SE1)/646(SE2), and the SE error
    status to ensure the context save procedure complete successfully.
    
    Change-Id: Ic80843902af70e76415530266cb158f668976c42
    Signed-off-by: default avatarMarvin Hsu <marvinh@nvidia.com>
    Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
    ce3c97c9
plat_psci_handlers.c 6.67 KB