/*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <arch_helpers.h>
#include "../bl1_private.h"
/*******************************************************************************
* Function that does the first bit of architectural setup that affects
* execution in the non-secure address space.
******************************************************************************/
void bl1_arch_setup(void)
{
/* Set the next EL to be AArch64 */
write_scr_el3(read_scr_el3() | SCR_RW_BIT);
}
/*******************************************************************************
* Set the Secure EL1 required architectural state
******************************************************************************/
void bl1_arch_next_el_setup(void)
{
u_register_t next_sctlr;
/* Use the same endianness than the current BL */
next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
/* Set SCTLR Secure EL1 */
next_sctlr |= SCTLR_EL1_RES1;
write_sctlr_el1(next_sctlr);
}
-
Deepika Bhavnani authored
We should either change them to `unsigned int` or `unsigned long long` when the size of the variable is the same in AArch64 and AArch32 or to `u_register_t` if it is supposed to be 32 bit wide in AArch32 and 64 bit wide in AArch64. Signed-off-by:
Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I80e2a6edb33248ee88be395829abbd4c36c89abe
ee006a79