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    aarch64: Enable Statistical Profiling Extensions for lower ELs · d832aee9
    dp-arm authored
    
    
    SPE is only supported in non-secure state.  Accesses to SPE specific
    registers from SEL1 will trap to EL3.  During a world switch, before
    `TTBR` is modified the SPE profiling buffers are drained.  This is to
    avoid a potential invalid memory access in SEL1.
    
    SPE is architecturally specified only for AArch64.
    
    Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0
    Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
    d832aee9
plat_arm.h 6.64 KB