• Jeetesh Burman's avatar
    Tegra186: add SE support to generate SHA256 of TZRAM · 4eed9c84
    Jeetesh Burman authored
    
    
    The BL3-1 firmware code is stored in TZSRAM on Tegra186 platforms. This
    memory loses power when we enter System Suspend and so its contents are
    stored to TZDRAM, before entry. This opens up an attack vector where the
    TZDRAM contents might be tampered with when we are in the System Suspend
    mode. To mitigate this attack the SE engine calculates the hash of entire
    TZSRAM and stores it in PMC scratch, before we copy data to TZDRAM. The
    WB0 code will validate the TZDRAM and match the hash with the one in PMC
    scratch.
    
    This patch adds driver for the SE engine, with APIs to calculate the hash
    and store SE SHA256 hash-result to PMC scratch registers.
    
    Change-Id: Ib487d5629225d3d99bd35d44f0402d6d3cf27ddf
    Signed-off-by: default avatarJeetesh Burman <jburman@nvidia.com>
    4eed9c84
tegra_def.h 13.5 KB