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adam.huang
Arm Trusted Firmware
Commits
01c44ddd
Commit
01c44ddd
authored
Aug 02, 2019
by
Alexei Fedorov
Committed by
TrustedFirmware Code Review
Aug 02, 2019
Browse files
Merge "Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__" into integration
parents
f61469e5
d5dfdeb6
Changes
90
Hide whitespace changes
Inline
Side-by-side
include/drivers/arm/ccn.h
View file @
01c44ddd
...
...
@@ -46,7 +46,7 @@
*/
#define CCN_GET_RUN_STATE(pstate) (pstate & 0xf)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
/*
...
...
@@ -109,5 +109,5 @@ unsigned long long ccn_read_node_reg(node_types_t node_type,
unsigned
int
node_id
,
unsigned
int
reg_offset
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* CCN_H */
include/drivers/arm/css/sds.h
View file @
01c44ddd
...
...
@@ -70,7 +70,7 @@
#define SDS_ERR_STRUCT_NOT_FOUND -3
#define SDS_ERR_STRUCT_NOT_FINALIZED -4
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stddef.h>
#include <stdint.h>
...
...
@@ -85,6 +85,6 @@ int sds_struct_read(uint32_t structure_id, unsigned int fld_off, void *data,
size_t
size
,
sds_access_mode_t
mode
);
int
sds_struct_write
(
uint32_t
structure_id
,
unsigned
int
fld_off
,
void
*
data
,
size_t
size
,
sds_access_mode_t
mode
);
#endif
/*__ASSEMBL
Y
__ */
#endif
/*__ASSEMBL
ER
__ */
#endif
/* SDS_H */
include/drivers/arm/fvp/fvp_pwrc.h
View file @
01c44ddd
...
...
@@ -35,7 +35,7 @@
#define PSYSR_INVALID U(0xffffffff)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -50,6 +50,6 @@ void fvp_pwrc_clr_wen(u_register_t mpidr);
unsigned
int
fvp_pwrc_read_psysr
(
u_register_t
mpidr
);
unsigned
int
fvp_pwrc_get_cpu_wkr
(
u_register_t
mpidr
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* FVP_PWRC_H */
include/drivers/arm/gicv2.h
View file @
01c44ddd
...
...
@@ -116,7 +116,7 @@
/* Interrupt ID mask for HPPIR, AHPPIR, IAR and AIAR CPU Interface registers */
#define INT_ID_MASK U(0x3ff)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <cdefs.h>
#include <stdint.h>
...
...
@@ -184,5 +184,5 @@ void gicv2_clear_interrupt_pending(unsigned int id);
unsigned
int
gicv2_set_pmr
(
unsigned
int
mask
);
void
gicv2_interrupt_set_cfg
(
unsigned
int
id
,
unsigned
int
cfg
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* GICV2_H */
include/drivers/arm/gicv3.h
View file @
01c44ddd
...
...
@@ -208,7 +208,7 @@
#define GITS_CTLR_QUIESCENT_SHIFT 31
#define GITS_CTLR_QUIESCENT_BIT BIT_32(GITS_CTLR_QUIESCENT_SHIFT)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdbool.h>
#include <stdint.h>
...
...
@@ -406,5 +406,5 @@ void gicv3_set_interrupt_pending(unsigned int id, unsigned int proc_num);
void
gicv3_clear_interrupt_pending
(
unsigned
int
id
,
unsigned
int
proc_num
);
unsigned
int
gicv3_set_pmr
(
unsigned
int
mask
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* GICV3_H */
include/drivers/arm/pl011.h
View file @
01c44ddd
...
...
@@ -83,7 +83,7 @@
#define CONSOLE_T_PL011_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -101,6 +101,6 @@ typedef struct {
int
console_pl011_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_pl011_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* PL011_H */
include/drivers/arm/sp805.h
View file @
01c44ddd
...
...
@@ -21,7 +21,7 @@
#define SP805_CTR_RESEN (U(1) << 1)
#define SP805_CTR_INTEN (U(1) << 0)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -31,6 +31,6 @@ void sp805_start(uintptr_t base, unsigned int ticks);
void
sp805_stop
(
uintptr_t
base
);
void
sp805_refresh
(
uintptr_t
base
,
unsigned
int
ticks
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* SP805_H */
include/drivers/arm/tzc400.h
View file @
01c44ddd
...
...
@@ -93,7 +93,7 @@
#define TZC_400_REGION_SIZE U(0x20)
#define TZC_400_ACTION_OFF U(0x4)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <cdefs.h>
#include <stdint.h>
...
...
@@ -154,6 +154,6 @@ static inline void tzc_disable_filters(void)
tzc400_disable_filters
();
}
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* TZC400_H */
include/drivers/arm/tzc_dmc500.h
View file @
01c44ddd
...
...
@@ -121,7 +121,7 @@
/* Length of registers for configuring each region */
#define TZC_DMC500_REGION_SIZE U(0x018)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -147,5 +147,5 @@ void tzc_dmc500_config_complete(void);
int
tzc_dmc500_verify_complete
(
void
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* TZC_DMC500_H */
include/drivers/auth/mbedtls/mbedtls_config.h
View file @
01c44ddd
...
...
@@ -86,7 +86,7 @@
/* Memory buffer allocator options */
#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 8
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
/* System headers required to build mbed TLS with the current configuration */
#include <stdlib.h>
#include "mbedtls/check_config.h"
...
...
include/drivers/cadence/cdns_uart.h
View file @
01c44ddd
...
...
@@ -27,7 +27,7 @@
#define CONSOLE_T_CDNS_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -45,6 +45,6 @@ typedef struct {
int
console_cdns_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_cdns_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* CDNS_UART_H */
include/drivers/console.h
View file @
01c44ddd
...
...
@@ -28,7 +28,7 @@
/* Returned by console_xxx() if no registered console implements xxx. */
#define ERROR_NO_VALID_CONSOLE (-128)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -75,6 +75,6 @@ int console_getc(void);
/* Flush all consoles registered for the current state. */
int
console_flush
(
void
);
#endif
/* __ASSEMBL
Y
__ */
#endif
/* __ASSEMBL
ER
__ */
#endif
/* CONSOLE_H */
include/drivers/marvell/cache_llc.h
View file @
01c44ddd
...
...
@@ -27,7 +27,7 @@
#define LLC_EXCLUSIVE_EN 0x100
#define LLC_WAY_MASK 0xFFFFFFFF
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
void
llc_cache_sync
(
int
ap_index
);
void
llc_flush_all
(
int
ap_index
);
void
llc_clean_all
(
int
ap_index
);
...
...
include/drivers/marvell/ccu.h
View file @
01c44ddd
...
...
@@ -10,7 +10,7 @@
#ifndef CCU_H
#define CCU_H
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <drivers/marvell/addr_map.h>
#endif
...
...
@@ -36,7 +36,7 @@
#define CCU_SRAM_WIN_CR CCU_WIN_CR_OFFSET(MVEBU_AP0, 1)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
int
init_ccu
(
int
);
void
ccu_win_check
(
struct
addr_map_win
*
win
);
void
ccu_enable_win
(
int
ap_index
,
struct
addr_map_win
*
win
,
uint32_t
win_id
);
...
...
include/drivers/marvell/uart/a3700_console.h
View file @
01c44ddd
...
...
@@ -56,7 +56,7 @@
#define CONSOLE_T_A3700_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -74,6 +74,6 @@ typedef struct {
int
console_a3700_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_a3700_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* A3700_CONSOLE_H */
include/drivers/meson/meson_console.h
View file @
01c44ddd
...
...
@@ -11,7 +11,7 @@
#define CONSOLE_T_MESON_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -32,6 +32,6 @@ typedef struct {
int
console_meson_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_meson_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* MESON_CONSOLE_H */
include/drivers/renesas/rcar/console/console.h
View file @
01c44ddd
...
...
@@ -9,7 +9,7 @@
#define CONSOLE_T_RCAR_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -27,6 +27,6 @@ typedef struct {
int
console_rcar_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_rcar_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* RCAR_PRINTF_H */
include/drivers/st/stm32_console.h
View file @
01c44ddd
...
...
@@ -11,7 +11,7 @@
#define CONSOLE_T_STM32_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -29,6 +29,6 @@ struct console_stm32 {
int
console_stm32_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
struct
console_stm32
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* STM32_CONSOLE_H */
include/drivers/st/stm32_gpio.h
View file @
01c44ddd
...
...
@@ -45,13 +45,13 @@
#define GPIO_PULL_DOWN 0x02
#define GPIO_PULL_MASK U(0x03)
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
int
dt_set_pinctrl_config
(
int
node
);
void
set_gpio
(
uint32_t
bank
,
uint32_t
pin
,
uint32_t
mode
,
uint32_t
speed
,
uint32_t
pull
,
uint32_t
alternate
,
uint8_t
status
);
void
set_gpio_secure_cfg
(
uint32_t
bank
,
uint32_t
pin
,
bool
secure
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* STM32_GPIO_H */
include/drivers/ti/uart/uart_16550.h
View file @
01c44ddd
...
...
@@ -73,7 +73,7 @@
#define CONSOLE_T_16550_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBL
Y
__
#ifndef __ASSEMBL
ER
__
#include <stdint.h>
...
...
@@ -91,6 +91,6 @@ typedef struct {
int
console_16550_register
(
uintptr_t
baseaddr
,
uint32_t
clock
,
uint32_t
baud
,
console_16550_t
*
console
);
#endif
/*__ASSEMBL
Y
__*/
#endif
/*__ASSEMBL
ER
__*/
#endif
/* UART_16550_H */
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