rockchip: Streamline and complete UARTn_BASE macros.

In order to set the UART base during bootup in common code of
plat/rockchip, we need to streamline the way the UART base addresses
are defined and add the missing definitions and mappings.

This patch does so by following the pattern UARTn_BASE, which is
already in use on RK3399 and RK3328. The numbering itself is derived
from the upstream Linux DTS files of the individual SoCs.
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f

plat/rockchip/rk3288/drivers/soc/soc.c

@@ -34,7 +34,15 @@ const mmap_region_t plat_rk_mmap[] = {
 			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
-	MAP_REGION_FLAT(UART_DBG_BASE, UART_DBG_SIZE,
+	MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART3_BASE, UART3_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART4_BASE, UART4_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(CRU_BASE, CRU_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),

plat/rockchip/rk3288/include/platform_def.h

@@ -87,7 +87,7 @@
 #define PLAT_RK_GICD_BASE		RK3288_GICD_BASE
 #define PLAT_RK_GICC_BASE		RK3288_GICC_BASE
 
-#define PLAT_RK_UART_BASE		RK3288_UART2_BASE
+#define PLAT_RK_UART_BASE		UART2_BASE
 #define PLAT_RK_UART_CLOCK		RK3288_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE		RK3288_BAUDRATE
 

plat/rockchip/rk3288/rk3288_def.h

@@ -28,8 +28,20 @@
 #define DDR_PHY1_BASE		0xff640000
 #define DDR_PHY1_SIZE		SIZE_K(64)
 
-#define UART_DBG_BASE		0xff690000
-#define UART_DBG_SIZE		SIZE_K(64)
+#define UART0_BASE		0xff180000
+#define UART0_SIZE		SIZE_K(64)
+
+#define UART1_BASE		0xff190000
+#define UART1_SIZE		SIZE_K(64)
+
+#define UART2_BASE		0xff690000
+#define UART2_SIZE		SIZE_K(64)
+
+#define UART3_BASE		0xff1b0000
+#define UART3_SIZE		SIZE_K(64)
+
+#define UART4_BASE		0xff1c0000
+#define UART4_SIZE		SIZE_K(64)
 
 /* 96k instead of 64k? */
 #define SRAM_BASE		0xff700000
@@ -71,7 +83,6 @@
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3288_UART2_BASE	UART_DBG_BASE
 #define RK3288_BAUDRATE		115200
 #define RK3288_UART_CLOCK	24000000
 

plat/rockchip/rk3328/drivers/soc/soc.c

@@ -19,6 +19,10 @@
 
 /* Table of regions to map using the MMU. */
 const mmap_region_t plat_rk_mmap[] = {
+	MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,

plat/rockchip/rk3328/include/platform_def.h

@@ -105,7 +105,7 @@
 #define PLAT_RK_GICD_BASE	RK3328_GICD_BASE
 #define PLAT_RK_GICC_BASE	RK3328_GICC_BASE
 
-#define PLAT_RK_UART_BASE	RK3328_UART2_BASE
+#define PLAT_RK_UART_BASE	UART2_BASE
 #define PLAT_RK_UART_CLOCK	RK3328_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE	RK3328_BAUDRATE
 

plat/rockchip/rk3328/rk3328_def.h

@@ -15,6 +15,12 @@
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define RK_BL31_PLAT_PARAM_VAL	0x0f1e2d3c4b5a6978ULL
 
+#define UART0_BASE		0xff110000
+#define UART0_SIZE		SIZE_K(64)
+
+#define UART1_BASE		0xff120000
+#define UART1_SIZE		SIZE_K(64)
+
 #define UART2_BASE		0xff130000
 #define UART2_SIZE		SIZE_K(64)
 
@@ -97,7 +103,6 @@
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3328_UART2_BASE	UART2_BASE
 #define RK3328_BAUDRATE	1500000
 #define RK3328_UART_CLOCK	24000000
 

plat/rockchip/rk3368/drivers/soc/soc.c

@@ -30,7 +30,15 @@ const mmap_region_t plat_rk_mmap[] = {
 			MT_MEMORY | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
-	MAP_REGION_FLAT(UART_DBG_BASE, UART_DBG_SIZE,
+	MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART3_BASE, UART3_SIZE,
+			MT_DEVICE | MT_RW | MT_SECURE),
+	MAP_REGION_FLAT(UART4_BASE, UART4_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),
 	MAP_REGION_FLAT(CRU_BASE, CRU_SIZE,
 			MT_DEVICE | MT_RW | MT_SECURE),

plat/rockchip/rk3368/include/platform_def.h

@@ -106,7 +106,7 @@
 #define PLAT_RK_GICD_BASE	RK3368_GICD_BASE
 #define PLAT_RK_GICC_BASE	RK3368_GICC_BASE
 
-#define PLAT_RK_UART_BASE	RK3368_UART2_BASE
+#define PLAT_RK_UART_BASE	UART2_BASE
 #define PLAT_RK_UART_CLOCK	RK3368_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE	RK3368_BAUDRATE
 

plat/rockchip/rk3368/rk3368_def.h

@@ -35,8 +35,20 @@
 #define RK_INTMEM_BASE		0xff8c0000
 #define RK_INTMEM_SIZE		0x10000
 
-#define UART_DBG_BASE		0xff690000
-#define UART_DBG_SIZE		0x10000
+#define UART0_BASE		0xff180000
+#define UART0_SIZE		0x10000
+
+#define UART1_BASE		0xff190000
+#define UART1_SIZE		0x10000
+
+#define UART2_BASE		0xff690000
+#define UART2_SIZE		0x10000
+
+#define UART3_BASE		0xff1b0000
+#define UART3_SIZE		0x10000
+
+#define UART4_BASE		0xff1c0000
+#define UART4_SIZE		0x10000
 
 #define CRU_BASE		0xff760000
 
@@ -57,7 +69,6 @@
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3368_UART2_BASE	UART_DBG_BASE
 #define RK3368_BAUDRATE		115200
 #define RK3368_UART_CLOCK	24000000