Commit 09d413a1 authored by Antonio Nino Diaz's avatar Antonio Nino Diaz
Browse files

SPM: Remove SP memory mappings definitions


This information is retrieved from the resource description now.

Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094
Co-authored-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
Showing with 12 additions and 44 deletions
+12 -44
...@@ -27,6 +27,9 @@ ...@@ -27,6 +27,9 @@
ARM_SP_IMAGE_SIZE, \ ARM_SP_IMAGE_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE) MT_MEMORY | MT_RW | MT_SECURE)
#endif #endif
#if SPM_DEPRECATED
#ifdef IMAGE_BL31 #ifdef IMAGE_BL31
/* SPM Payload memory. Mapped as code in S-EL1 */ /* SPM Payload memory. Mapped as code in S-EL1 */
#define ARM_SP_IMAGE_MMAP MAP_REGION2( \ #define ARM_SP_IMAGE_MMAP MAP_REGION2( \
...@@ -96,6 +99,8 @@ ...@@ -96,6 +99,8 @@
/* Total number of memory regions with distinct properties */ /* Total number of memory regions with distinct properties */
#define ARM_SP_IMAGE_NUM_MEM_REGIONS 6 #define ARM_SP_IMAGE_NUM_MEM_REGIONS 6
#endif /* SPM_DEPRECATED */
/* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */ /* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */
#define PLAT_SPM_COOKIE_0 ULL(0) #define PLAT_SPM_COOKIE_0 ULL(0)
#define PLAT_SPM_COOKIE_1 ULL(0) #define PLAT_SPM_COOKIE_1 ULL(0)
......
...@@ -37,7 +37,7 @@ typedef struct arm_tzc_regions_info { ...@@ -37,7 +37,7 @@ typedef struct arm_tzc_regions_info {
* - Region 1 with secure access only; * - Region 1 with secure access only;
* - the remaining DRAM regions access from the given Non-Secure masters. * - the remaining DRAM regions access from the given Non-Secure masters.
******************************************************************************/ ******************************************************************************/
#if ENABLE_SPM #if ENABLE_SPM && SPM_DEPRECATED
#define ARM_TZC_REGIONS_DEF \ #define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \ {ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
TZC_REGION_S_RDWR, 0}, \ TZC_REGION_S_RDWR, 0}, \
......
...@@ -124,13 +124,13 @@ const mmap_region_t plat_arm_mmap[] = { ...@@ -124,13 +124,13 @@ const mmap_region_t plat_arm_mmap[] = {
MAP_DEVICE0, MAP_DEVICE0,
MAP_DEVICE1, MAP_DEVICE1,
ARM_V2M_MAP_MEM_PROTECT, ARM_V2M_MAP_MEM_PROTECT,
#if ENABLE_SPM #if ENABLE_SPM && SPM_DEPRECATED
ARM_SPM_BUF_EL3_MMAP, ARM_SPM_BUF_EL3_MMAP,
#endif #endif
{0} {0}
}; };
#if ENABLE_SPM && defined(IMAGE_BL31) #if ENABLE_SPM && defined(IMAGE_BL31) && SPM_DEPRECATED
const mmap_region_t plat_arm_secure_partition_mmap[] = { const mmap_region_t plat_arm_secure_partition_mmap[] = {
V2M_MAP_IOFPGA_EL0, /* for the UART */ V2M_MAP_IOFPGA_EL0, /* for the UART */
MAP_REGION_FLAT(DEVICE0_BASE, \ MAP_REGION_FLAT(DEVICE0_BASE, \
...@@ -232,7 +232,6 @@ const struct secure_partition_boot_info *plat_get_secure_partition_boot_info( ...@@ -232,7 +232,6 @@ const struct secure_partition_boot_info *plat_get_secure_partition_boot_info(
{ {
return &plat_arm_secure_partition_boot_info; return &plat_arm_secure_partition_boot_info;
} }
#endif #endif
/******************************************************************************* /*******************************************************************************
......
...@@ -13,7 +13,6 @@ ...@@ -13,7 +13,6 @@
#include <debug.h> #include <debug.h>
#include <platform_def.h> #include <platform_def.h>
#include <platform.h> #include <platform.h>
#include <secure_partition.h>
#include <string.h> #include <string.h>
#include <xlat_tables_v2.h> #include <xlat_tables_v2.h>
...@@ -39,57 +38,24 @@ void spm_sp_setup(sp_context_t *sp_ctx) ...@@ -39,57 +38,24 @@ void spm_sp_setup(sp_context_t *sp_ctx)
ep_info.spsr = SPSR_64(MODE_EL0, MODE_SP_EL0, DISABLE_ALL_EXCEPTIONS); ep_info.spsr = SPSR_64(MODE_EL0, MODE_SP_EL0, DISABLE_ALL_EXCEPTIONS);
/* /*
* X0: Virtual address of a buffer shared between EL3 and Secure EL0. * X0: Unused (MBZ).
* The buffer will be mapped in the Secure EL1 translation regime * X1: Unused (MBZ).
* with Normal IS WBWA attributes and RO data and Execute Never
* instruction access permissions.
*
* X1: Size of the buffer in bytes
*
* X2: cookie value (Implementation Defined) * X2: cookie value (Implementation Defined)
*
* X3: cookie value (Implementation Defined) * X3: cookie value (Implementation Defined)
*
* X4 to X7 = 0 * X4 to X7 = 0
*/ */
ep_info.args.arg0 = PLAT_SPM_BUF_BASE; ep_info.args.arg0 = 0;
ep_info.args.arg1 = PLAT_SPM_BUF_SIZE; ep_info.args.arg1 = 0;
ep_info.args.arg2 = PLAT_SPM_COOKIE_0; ep_info.args.arg2 = PLAT_SPM_COOKIE_0;
ep_info.args.arg3 = PLAT_SPM_COOKIE_1; ep_info.args.arg3 = PLAT_SPM_COOKIE_1;
cm_setup_context(ctx, &ep_info); cm_setup_context(ctx, &ep_info);
/*
* SP_EL0: A non-zero value will indicate to the SP that the SPM has
* initialized the stack pointer for the current CPU through
* implementation defined means. The value will be 0 otherwise.
*/
write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_SP_EL0,
PLAT_SP_IMAGE_STACK_BASE + PLAT_SP_IMAGE_STACK_PCPU_SIZE);
/* /*
* Setup translation tables * Setup translation tables
* ------------------------ * ------------------------
*/ */
#if ENABLE_ASSERTIONS
/* Get max granularity supported by the platform. */
unsigned int max_granule = xlat_arch_get_max_supported_granule_size();
VERBOSE("Max translation granule size supported: %u KiB\n",
max_granule / 1024U);
unsigned int max_granule_mask = max_granule - 1U;
/* Base must be aligned to the max granularity */
assert((ARM_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
/* Size must be a multiple of the max granularity */
assert((ARM_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
#endif /* ENABLE_ASSERTIONS */
/* This region contains the exception vectors used at S-EL1. */ /* This region contains the exception vectors used at S-EL1. */
const mmap_region_t sel1_exception_vectors = const mmap_region_t sel1_exception_vectors =
MAP_REGION_FLAT(SPM_SHIM_EXCEPTIONS_START, MAP_REGION_FLAT(SPM_SHIM_EXCEPTIONS_START,
......
...@@ -10,7 +10,6 @@ ...@@ -10,7 +10,6 @@
#include <errno.h> #include <errno.h>
#include <platform_def.h> #include <platform_def.h>
#include <platform.h> #include <platform.h>
#include <secure_partition.h>
#include <spm_svc.h> #include <spm_svc.h>
#include <xlat_tables_v2.h> #include <xlat_tables_v2.h>
......
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include <mm_svc.h> #include <mm_svc.h>
#include <platform.h> #include <platform.h>
#include <runtime_svc.h> #include <runtime_svc.h>
#include <secure_partition.h>
#include <smccc.h> #include <smccc.h>
#include <smccc_helpers.h> #include <smccc_helpers.h>
#include <spinlock.h> #include <spinlock.h>
......
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