Merge pull request #1423 from chandnich/sgi-575/dyncfg

Sgi 575/dyncfg

plat/arm/css/sgi/fdts/sgi575.dts

+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+/ {
+	/* compatible string */
+	compatible = "arm,sgi575";
+};

plat/arm/css/sgi/fdts/sgi575_tb_fw_config.dts

+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+/ {
+	/* Platform Config */
+	compatible = "arm,tb_fw";
+	hw_config_addr = <0x0 0xFEF00000>;
+	hw_config_max_size = <0x0100000>;
+};

plat/arm/css/sgi/sgi-common.mk

@@ -30,7 +30,8 @@ BL1_SOURCES		+=	${INTERCONNECT_SOURCES}			\
 				${CSS_ENT_BASE}/sgi_bl1_setup.c	\
 				${CSS_ENT_BASE}/sgi_plat_config.c
 
-BL2_SOURCES		+=	${CSS_ENT_BASE}/sgi_security.c
+BL2_SOURCES		+=	${CSS_ENT_BASE}/sgi_security.c		\
+				${CSS_ENT_BASE}/sgi_image_load.c
 
 BL31_SOURCES		+=	${ENT_CPU_SOURCES}			\
 				${INTERCONNECT_SOURCES}			\
@@ -39,6 +40,19 @@ BL31_SOURCES		+=	${ENT_CPU_SOURCES}			\
 				${CSS_ENT_BASE}/sgi_topology.c	\
 				${CSS_ENT_BASE}/sgi_plat_config.c
 
+# Add the FDT_SOURCES and options for Dynamic Config
+FDT_SOURCES		+=	${CSS_ENT_BASE}/fdts/${PLAT}_tb_fw_config.dts
+TB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
+
+# Add the TB_FW_CONFIG to FIP and specify the same to certtool
+$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
+
+FDT_SOURCES		+=	${CSS_ENT_BASE}/fdts/${PLAT}.dts
+HW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}.dtb
+
+# Add the HW_CONFIG to FIP and specify the same to certtool
+$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config))
+
 $(eval $(call add_define,SGI_PLAT))
 
 override CSS_LOAD_SCP_IMAGES	:=	0

plat/arm/css/sgi/sgi_bl31_setup.c

@@ -12,23 +12,8 @@
 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 				u_register_t arg2, u_register_t arg3)
 {
-	uint32_t plat_version;
-	bl_params_node_t *bl_params;
-
-	bl_params = ((bl_params_t *)arg0)->head;
-
 	/* Initialize the platform configuration structure */
 	plat_config_init();
 
-	while (bl_params) {
-		if (bl_params->image_id == BL33_IMAGE_ID) {
-			plat_version = mmio_read_32(SSC_VERSION);
-			bl_params->ep_info->args.arg2 = plat_version;
-			break;
-		}
-
-		bl_params = bl_params->next_params_info;
-	}
-
 	arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
 }

plat/arm/css/sgi/sgi_image_load.c

+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <debug.h>
+#include <desc_image_load.h>
+#include <libfdt.h>
+#include <platform.h>
+
+/*******************************************************************************
+ * This function inserts Platform information via device tree nodes as,
+ * system-id {
+ *    platform-id = <0>;
+ * }
+ ******************************************************************************/
+static int plat_sgi_append_config_node(void)
+{
+	bl_mem_params_node_t *mem_params;
+	void *fdt;
+	int nodeoffset, err;
+	unsigned int platid = 0;
+	char *platform_name;
+
+	mem_params = get_bl_mem_params_node(HW_CONFIG_ID);
+	if (mem_params == NULL) {
+		ERROR("HW CONFIG base address is NULL");
+		return -1;
+	}
+
+	fdt = (void *)(mem_params->image_info.image_base);
+
+	/* Check the validity of the fdt */
+	if (fdt_check_header(fdt) != 0) {
+		ERROR("Invalid HW_CONFIG DTB passed\n");
+		return -1;
+	}
+
+	platform_name = (char *)fdt_getprop(fdt, 0, "compatible", NULL);
+
+	if (strcmp(platform_name, "arm,sgi575") == 0) {
+		platid = mmio_read_32(SSC_VERSION);
+	} else {
+		WARN("Invalid platform \n");
+		return -1;
+	}
+
+	/* Increase DTB blob by 512 byte */
+	err = fdt_open_into(fdt, fdt, mem_params->image_info.image_size + 512);
+	if (err < 0) {
+		ERROR("Failed to open HW_CONFIG DTB\n");
+		return -1;
+	}
+
+	/* Create "/system-id" node */
+	nodeoffset = fdt_add_subnode(fdt, 0, "system-id");
+	if (nodeoffset < 0) {
+		ERROR("Failed to add node system-id\n");
+		return -1;
+	}
+
+	err = fdt_setprop_u32(fdt, nodeoffset, "platform-id", platid);
+	if (err < 0) {
+		ERROR("Failed to add node platform-id\n");
+		return -1;
+	}
+	return 0;
+}
+
+/*******************************************************************************
+ * This function returns the list of executable images.
+ ******************************************************************************/
+bl_params_t *plat_get_next_bl_params(void)
+{
+	int ret;
+	bl_params_t *next_bl_params;
+
+	ret = plat_sgi_append_config_node();
+	if (ret != 0)
+		panic();
+
+	next_bl_params = get_next_bl_params_from_mem_params_desc();
+	populate_next_bl_params_config(next_bl_params);
+
+	return next_bl_params;
+}

plat/arm/css/sgi/sgi_plat.c

@@ -72,50 +72,3 @@ const mmap_region_t plat_arm_mmap[] = {
 #endif
 
 ARM_CASSERT_MMAP
-
-/*
- * Set up the page tables for the generic and platform-specific memory regions.
- * The extents of the generic memory regions are specified by the function
- * arguments and consist of:
- * - Trusted SRAM seen by the BL image;
- * - Code section;
- * - Read-only data section;
- * - Coherent memory region, if applicable.
- */
-
-#if IMAGE_BL1
-void bl1_plat_arch_setup(void)
-{
-	arm_setup_page_tables(ARM_BL_RAM_BASE,
-			      ARM_BL_RAM_SIZE,
-			      BL_CODE_BASE,
-			      BL1_CODE_END,
-			      BL1_RO_DATA_BASE,
-			      BL1_RO_DATA_END
-#if USE_COHERENT_MEM
-			      , BL1_COHERENT_RAM_BASE,
-			      BL1_COHERENT_RAM_LIMIT
-#endif /* USE_COHERENT_MEM */
-			     );
-
-	enable_mmu_el3(0);
-}
-#endif /* IMAGE_BL1 */
-
-#if IMAGE_BL2
-void bl2_plat_arch_setup(void)
-{
-	arm_setup_page_tables(BL2_BASE,
-			      BL2_LIMIT-BL2_BASE,
-			      BL_CODE_BASE,
-			      BL_CODE_END,
-			      BL_RO_DATA_BASE,
-			      BL_RO_DATA_END
-#if USE_COHERENT_MEM
-			      , BL2_COHERENT_RAM_BASE,
-			      BL2_COHERENT_RAM_LIMIT
-#endif /* USE_COHERENT_MEM */
-			      );
-	enable_mmu_el1(0);
-}
-#endif /* IMAGE_BL2 */