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adam.huang
Arm Trusted Firmware
Commits
0d6aff20
Commit
0d6aff20
authored
Aug 10, 2021
by
Bipin Ravi
Committed by
TrustedFirmware Code Review
Aug 10, 2021
Browse files
Merge "errata: workaround for Neoverse V1 errata 2139242" into integration
parents
9aacfb6f
100d4029
Changes
3
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docs/design/cpu-specific-build-macros.rst
View file @
0d6aff20
...
...
@@ -349,6 +349,10 @@ For Neoverse V1, the following errata build flags are defined :
issue is present in r0p0 as well but there is no workaround for that
revision. It is still open.
- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1
CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the
CPU. It is still open.
DSU Errata Workarounds
----------------------
...
...
lib/cpus/aarch64/neoverse_v1.S
View file @
0d6aff20
...
...
@@ -224,6 +224,41 @@ func check_errata_1966096
b
cpu_rev_var_range
endfunc
check_errata_1966096
/
*
--------------------------------------------------
*
Errata
Workaround
for
Neoverse
V1
Errata
#
2139242
.
*
This
applies
to
revisions
r0p0
,
r1p0
,
and
r1p1
,
it
*
is
still
open
.
*
x0
:
variant
[
4
:
7
]
and
revision
[
0
:
3
]
of
current
cpu
.
*
Shall
clobber
:
x0
-
x17
*
--------------------------------------------------
*/
func
errata_neoverse_v1_2139242_wa
/
*
Check
workaround
compatibility
.
*/
mov
x17
,
x30
bl
check_errata_2139242
cbz
x0
,
1
f
/
*
Apply
the
workaround
.
*/
mov
x0
,
#
0x3
msr
S3_6_C15_C8_0
,
x0
ldr
x0
,
=
0xEE720F14
msr
S3_6_C15_C8_2
,
x0
ldr
x0
,
=
0xFFFF0FDF
msr
S3_6_C15_C8_3
,
x0
ldr
x0
,
=
0x40000005003FF
msr
S3_6_C15_C8_1
,
x0
isb
1
:
ret
x17
endfunc
errata_neoverse_v1_2139242_wa
func
check_errata_2139242
/
*
Applies
to
r0p0
,
r1p0
,
r1p1
*/
mov
x1
,
#
0x11
b
cpu_rev_var_ls
endfunc
check_errata_2139242
/
*
---------------------------------------------
*
HW
will
do
the
cache
maintenance
while
powering
down
*
---------------------------------------------
...
...
@@ -260,6 +295,7 @@ func neoverse_v1_errata_report
report_errata
ERRATA_V1_1925756
,
neoverse_v1
,
1925756
report_errata
ERRATA_V1_1940577
,
neoverse_v1
,
1940577
report_errata
ERRATA_V1_1966096
,
neoverse_v1
,
1966096
report_errata
ERRATA_V1_2139242
,
neoverse_v1
,
2139242
ldp
x8
,
x30
,
[
sp
],
#
16
ret
...
...
@@ -303,6 +339,11 @@ func neoverse_v1_reset_func
bl
errata_neoverse_v1_1966096_wa
#endif
#if ERRATA_V1_2139242
mov
x0
,
x18
bl
errata_neoverse_v1_2139242_wa
#endif
ret
x19
endfunc
neoverse_v1_reset_func
...
...
lib/cpus/cpu-ops.mk
View file @
0d6aff20
...
...
@@ -397,6 +397,10 @@ ERRATA_V1_1940577 ?=0
# exists in r0p0 as well but there is no workaround for that revision.
ERRATA_V1_1966096
?=
0
# Flag to apply erratum 2139242 workaround during reset. This erratum applies
# to revisions r0p0, r1p0, and r1p1 of the Neoverse V1 cpu and is still open.
ERRATA_V1_2139242
?=
0
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
# Applying the workaround results in higher DSU power consumption on idle.
ERRATA_DSU_798953
?=
0
...
...
@@ -726,6 +730,10 @@ $(eval $(call add_define,ERRATA_V1_1940577))
$(eval
$(call
assert_boolean,ERRATA_V1_1966096))
$(eval
$(call
add_define,ERRATA_V1_1966096))
# Process ERRATA_V1_2139242 flag
$(eval
$(call
assert_boolean,ERRATA_V1_2139242))
$(eval
$(call
add_define,ERRATA_V1_2139242))
# Process ERRATA_DSU_798953 flag
$(eval
$(call
assert_boolean,ERRATA_DSU_798953))
$(eval
$(call
add_define,ERRATA_DSU_798953))
...
...
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