Commit 0d8cb493 authored by Hung-Te Lin's avatar Hung-Te Lin Committed by kenny liang
Browse files

mediatek: mt8183: Support coreboot configuration



When built for coreboot, we want to enable coreboot library to have
better integration. For example, serial console should be initialized by
coreboot_serial instead of hard-coded values.

Most coreboot configuration will enable memory console, which needs
larger XLAT_TABLES so MAX_XLAT_TABLES is increased; and to support that,
TZRAM_SIZE also need to be enlarged.

Change-Id: I08cf22df2fa26e48284e323d22ad8ce73a6ea803
Signed-off-by: default avatarHung-Te Lin <hungte@chromium.org>
parent 3d91c9c3
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <drivers/generic_delay_timer.h> #include <drivers/generic_delay_timer.h>
#include <mcucfg.h> #include <mcucfg.h>
#include <mt_gic_v3.h> #include <mt_gic_v3.h>
#include <lib/coreboot.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include <mtk_plat_common.h> #include <mtk_plat_common.h>
#include <mtspmc.h> #include <mtspmc.h>
...@@ -77,7 +78,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, ...@@ -77,7 +78,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
params_early_setup(arg1); params_early_setup(arg1);
#if COREBOOT
if (coreboot_serial.type)
console_16550_register(coreboot_serial.baseaddr,
coreboot_serial.input_hertz,
coreboot_serial.baud,
&console);
#else
console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
#endif
NOTICE("MT8183 bl31_setup\n"); NOTICE("MT8183 bl31_setup\n");
......
...@@ -273,7 +273,7 @@ INTR_PROP_DESC(MT_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \ ...@@ -273,7 +273,7 @@ INTR_PROP_DESC(MT_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \
******************************************************************************/ ******************************************************************************/
#define TZRAM_BASE 0x54600000 #define TZRAM_BASE 0x54600000
#define TZRAM_SIZE 0x00020000 #define TZRAM_SIZE 0x00030000
/******************************************************************************* /*******************************************************************************
* BL31 specific defines. * BL31 specific defines.
...@@ -291,7 +291,7 @@ INTR_PROP_DESC(MT_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \ ...@@ -291,7 +291,7 @@ INTR_PROP_DESC(MT_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \
******************************************************************************/ ******************************************************************************/
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32) #define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 4 #define MAX_XLAT_TABLES 16
#define MAX_MMAP_REGIONS 16 #define MAX_MMAP_REGIONS 16
/******************************************************************************* /*******************************************************************************
......
...@@ -70,3 +70,5 @@ MULTI_CONSOLE_API := 1 ...@@ -70,3 +70,5 @@ MULTI_CONSOLE_API := 1
MACH_MT8183 := 1 MACH_MT8183 := 1
$(eval $(call add_define,MACH_MT8183)) $(eval $(call add_define,MACH_MT8183))
include lib/coreboot/coreboot.mk
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