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adam.huang
Arm Trusted Firmware
Commits
0fbc4aa0
Commit
0fbc4aa0
authored
3 years ago
by
Manish Pandey
Committed by
TrustedFirmware Code Review
3 years ago
Browse files
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Merge "refactor(plat/zynqmp): optimize the code to save some space" into integration
parents
6db11196
db97f939
Changes
3
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3 changed files
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+4
-8
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+0
-20
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
plat/xilinx/zynqmp/plat_psci.c
+0
-9
plat/xilinx/zynqmp/plat_psci.c
with
4 additions
and
37 deletions
+4
-37
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
View file @
0fbc4aa0
...
...
@@ -148,11 +148,6 @@ static const struct {
.
id
=
0x40
,
.
name
=
"XCZU11EG"
,
},
{
/* For testing purpose only */
.
id
=
0x50
,
.
ver
=
0x2c
,
.
name
=
"XCZU15CG"
,
},
{
.
id
=
0x50
,
.
name
=
"XCZU15EG"
,
...
...
@@ -334,9 +329,10 @@ static void zynqmp_print_platform_name(void)
break
;
}
NOTICE
(
"TF-A running on %s/%s v%d/RTL%d.%d at 0x%x
\n
"
,
zynqmp_print_silicon_idcode
(),
label
,
zynqmp_get_ps_ver
(),
(
rtl
&
0xf0
)
>>
4
,
rtl
&
0xf
,
BL31_BASE
);
NOTICE
(
"TF-A running on %s/%s at 0x%x
\n
"
,
zynqmp_print_silicon_idcode
(),
label
,
BL31_BASE
);
VERBOSE
(
"TF-A running on v%d/RTL%d.%d
\n
"
,
zynqmp_get_ps_ver
(),
(
rtl
&
0xf0
)
>>
4
,
rtl
&
0xf
);
}
#else
static
inline
void
zynqmp_print_platform_name
(
void
)
{
}
...
...
This diff is collapsed.
Click to expand it.
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
View file @
0fbc4aa0
...
...
@@ -123,25 +123,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
}
}
/* Enable the test setup */
#ifndef ZYNQMP_TESTING
static
void
zynqmp_testing_setup
(
void
)
{
}
#else
static
void
zynqmp_testing_setup
(
void
)
{
uint32_t
actlr_el3
,
actlr_el2
;
/* Enable CPU ACTLR AND L2ACTLR RW access from non-secure world */
actlr_el3
=
read_actlr_el3
();
actlr_el2
=
read_actlr_el2
();
actlr_el3
|=
ACTLR_EL3_L2ACTLR_BIT
|
ACTLR_EL3_CPUACTLR_BIT
;
actlr_el2
|=
ACTLR_EL3_L2ACTLR_BIT
|
ACTLR_EL3_CPUACTLR_BIT
;
write_actlr_el3
(
actlr_el3
);
write_actlr_el2
(
actlr_el2
);
}
#endif
#if ZYNQMP_WDT_RESTART
static
interrupt_type_handler_t
type_el3_interrupt_table
[
MAX_INTR_EL3
];
...
...
@@ -183,7 +164,6 @@ void bl31_platform_setup(void)
/* Initialize the gic cpu and distributor interfaces */
plat_arm_gic_driver_init
();
plat_arm_gic_init
();
zynqmp_testing_setup
();
}
void
bl31_plat_runtime_setup
(
void
)
...
...
This diff is collapsed.
Click to expand it.
plat/xilinx/zynqmp/plat_psci.c
View file @
0fbc4aa0
...
...
@@ -179,14 +179,6 @@ int zynqmp_validate_power_state(unsigned int power_state,
return
PSCI_E_SUCCESS
;
}
int
zynqmp_validate_ns_entrypoint
(
unsigned
long
ns_entrypoint
)
{
VERBOSE
(
"%s: ns_entrypoint: 0x%lx
\n
"
,
__func__
,
ns_entrypoint
);
/* FIXME: Actually validate */
return
PSCI_E_SUCCESS
;
}
void
zynqmp_get_sys_suspend_power_state
(
psci_power_state_t
*
req_state
)
{
req_state
->
pwr_domain_state
[
PSCI_CPU_PWR_LVL
]
=
PLAT_MAX_OFF_STATE
;
...
...
@@ -206,7 +198,6 @@ static const struct plat_psci_ops zynqmp_psci_ops = {
.
system_off
=
zynqmp_system_off
,
.
system_reset
=
zynqmp_system_reset
,
.
validate_power_state
=
zynqmp_validate_power_state
,
.
validate_ns_entrypoint
=
zynqmp_validate_ns_entrypoint
,
.
get_sys_suspend_power_state
=
zynqmp_get_sys_suspend_power_state
,
};
...
...
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Click to expand it.
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