Merge "Revert workaround for Neoverse N1 erratum 1800710" into integration

docs/design/cpu-specific-build-macros.rst

@@ -278,9 +278,6 @@ For Neoverse N1, the following errata build flags are defined :
 -  ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1
    CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU.
 
--  ``ERRATA_N1_1800710``: This applies errata 1800710 workaround to Neoverse-N1
-   CPU. This needs to be enabled only for revisions <= r4p0 of the CPU.
-
 DSU Errata Workarounds
 ----------------------
 

include/lib/cpus/aarch64/neoverse_n1.h

@@ -35,7 +35,6 @@
 
 #define NEOVERSE_N1_WS_THR_L2_MASK	(ULL(3) << 24)
 #define NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT	(ULL(1) << 51)
-#define NEOVERSE_N1_CPUECTLR_EL1_BIT_53			(ULL(1) << 53)
 #define NEOVERSE_N1_CPUECTLR_EL1_EXTLLC_BIT		(ULL(1) << 0)
 
 /*******************************************************************************

lib/cpus/aarch64/neoverse_n1.S

@@ -375,35 +375,6 @@ func check_errata_1542419
 	b	cpu_rev_var_range
 endfunc check_errata_1542419
 
-/* --------------------------------------------------
- * Errata Workaround for Neoverse N1 Erratum 1800710.
- * This applies to revisions <= r4p0 of Neoverse N1
- * Inputs:
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x17
- * --------------------------------------------------
- */
-func errata_n1_1800710_wa
-	/* Compare x0 against revision <= r4p0 */
-	mov	x17, x30
-	bl	check_errata_1800710
-	cbz	x0, 1f
-
-	/* Disable allocation of splintered pages in the L2 TLB */
-	mrs	x1, NEOVERSE_N1_CPUECTLR_EL1
-	orr	x1, x1, NEOVERSE_N1_CPUECTLR_EL1_BIT_53
-	msr	NEOVERSE_N1_CPUECTLR_EL1, x1
-	isb
-1:
-	ret	x17
-endfunc errata_n1_1800710_wa
-
-func check_errata_1800710
-	/* Applies to everything <= r4p0 */
-	mov	x1, #0x40
-	b	cpu_rev_var_ls
-endfunc check_errata_1800710
-
 func neoverse_n1_reset_func
 	mov	x19, x30
 
@@ -478,11 +449,6 @@ func neoverse_n1_reset_func
 	bl	errata_n1_1542419_wa
 #endif
 
-#if ERRATA_N1_1800710
-	mov	x0, x18
-	bl	errata_n1_1800710_wa
-#endif
-
 #if ENABLE_AMU
 	/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
 	mrs	x0, actlr_el3
@@ -556,7 +522,6 @@ func neoverse_n1_errata_report
 	report_errata ERRATA_N1_1275112, neoverse_n1, 1275112
 	report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
 	report_errata ERRATA_N1_1542419, neoverse_n1, 1542419
-	report_errata ERRATA_N1_1800710, neoverse_n1, 1800710
 	report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
 
 	ldp	x8, x30, [sp], #16

lib/cpus/cpu-ops.mk

@@ -314,10 +314,6 @@ ERRATA_N1_1315703	?=0
 # to revisions r3p0 - r4p0 of the Neoverse N1 cpu.
 ERRATA_N1_1542419	?=0
 
-# Flag to apply erratum 1800710 workaround during reset. This erratum applies
-# to revisions <= r4p0 of the Neoverse N1 cpu.
-ERRATA_N1_1800710	?=0
-
 # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
 # Applying the workaround results in higher DSU power consumption on idle.
 ERRATA_DSU_798953	?=0
@@ -567,10 +563,6 @@ $(eval $(call add_define,ERRATA_N1_1315703))
 $(eval $(call assert_boolean,ERRATA_N1_1542419))
 $(eval $(call add_define,ERRATA_N1_1542419))
 
-# Process ERRATA_N1_1800710 flag
-$(eval $(call assert_boolean,ERRATA_N1_1800710))
-$(eval $(call add_define,ERRATA_N1_1800710))
-
 # Process ERRATA_DSU_798953 flag
 $(eval $(call assert_boolean,ERRATA_DSU_798953))
 $(eval $(call add_define,ERRATA_DSU_798953))