Commit 108e4df7 authored by davidcunado-arm's avatar davidcunado-arm Committed by GitHub
Browse files

Merge pull request #834 from douglas-raillard-arm/dr/use_dc_zva_zeroing

Use DC ZVA instruction to zero memory
parents 406a4ade 32f0d3c6
/* /*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -133,7 +133,8 @@ SECTIONS ...@@ -133,7 +133,8 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 16-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss : ALIGN(16) { .bss : ALIGN(16) {
__BSS_START__ = .; __BSS_START__ = .;
......
/* /*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -335,7 +335,7 @@ static int bl1_fwu_image_auth(unsigned int image_id, ...@@ -335,7 +335,7 @@ static int bl1_fwu_image_auth(unsigned int image_id,
*/ */
if (image_desc->state == IMAGE_STATE_COPIED) { if (image_desc->state == IMAGE_STATE_COPIED) {
/* Clear the memory.*/ /* Clear the memory.*/
memset((void *)base_addr, 0, total_size); zero_normalmem((void *)base_addr, total_size);
flush_dcache_range(base_addr, total_size); flush_dcache_range(base_addr, total_size);
/* Indicate that image can be copied again*/ /* Indicate that image can be copied again*/
......
/* /*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -94,12 +94,12 @@ func bl2_entrypoint ...@@ -94,12 +94,12 @@ func bl2_entrypoint
*/ */
ldr x0, =__BSS_START__ ldr x0, =__BSS_START__
ldr x1, =__BSS_SIZE__ ldr x1, =__BSS_SIZE__
bl zeromem16 bl zeromem
#if USE_COHERENT_MEM #if USE_COHERENT_MEM
ldr x0, =__COHERENT_RAM_START__ ldr x0, =__COHERENT_RAM_START__
ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__
bl zeromem16 bl zeromem
#endif #endif
/* -------------------------------------------- /* --------------------------------------------
......
/* /*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -113,7 +113,8 @@ SECTIONS ...@@ -113,7 +113,8 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 16-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss : ALIGN(16) { .bss : ALIGN(16) {
__BSS_START__ = .; __BSS_START__ = .;
......
/* /*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -94,7 +94,7 @@ func bl2u_entrypoint ...@@ -94,7 +94,7 @@ func bl2u_entrypoint
*/ */
ldr x0, =__BSS_START__ ldr x0, =__BSS_START__
ldr x1, =__BSS_SIZE__ ldr x1, =__BSS_SIZE__
bl zeromem16 bl zeromem
/* -------------------------------------------- /* --------------------------------------------
* Allocate a stack whose memory will be marked * Allocate a stack whose memory will be marked
......
/* /*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -100,7 +100,8 @@ SECTIONS ...@@ -100,7 +100,8 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 16-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss : ALIGN(16) { .bss : ALIGN(16) {
__BSS_START__ = .; __BSS_START__ = .;
......
/* /*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -158,7 +158,8 @@ SECTIONS ...@@ -158,7 +158,8 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 16-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss (NOLOAD) : ALIGN(16) { .bss (NOLOAD) : ALIGN(16) {
__BSS_START__ = .; __BSS_START__ = .;
......
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -134,9 +134,10 @@ SECTIONS ...@@ -134,9 +134,10 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 8-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss (NOLOAD) : ALIGN(16) { .bss (NOLOAD) : ALIGN(8) {
__BSS_START__ = .; __BSS_START__ = .;
*(.bss*) *(.bss*)
*(COMMON) *(COMMON)
......
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -45,6 +45,7 @@ ...@@ -45,6 +45,7 @@
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <types.h> #include <types.h>
#include <utils.h>
#include "sp_min_private.h" #include "sp_min_private.h"
/* Pointers to per-core cpu contexts */ /* Pointers to per-core cpu contexts */
...@@ -203,7 +204,7 @@ void sp_min_warm_boot(void) ...@@ -203,7 +204,7 @@ void sp_min_warm_boot(void)
smc_set_next_ctx(NON_SECURE); smc_set_next_ctx(NON_SECURE);
next_smc_ctx = smc_get_next_ctx(); next_smc_ctx = smc_get_next_ctx();
memset(next_smc_ctx, 0, sizeof(smc_ctx_t)); zeromem(next_smc_ctx, sizeof(smc_ctx_t));
copy_cpu_ctx_to_smc_stx(get_regs_ctx(cm_get_context(NON_SECURE)), copy_cpu_ctx_to_smc_stx(get_regs_ctx(cm_get_context(NON_SECURE)),
next_smc_ctx); next_smc_ctx);
......
/* /*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -120,12 +120,12 @@ func tsp_entrypoint ...@@ -120,12 +120,12 @@ func tsp_entrypoint
*/ */
ldr x0, =__BSS_START__ ldr x0, =__BSS_START__
ldr x1, =__BSS_SIZE__ ldr x1, =__BSS_SIZE__
bl zeromem16 bl zeromem
#if USE_COHERENT_MEM #if USE_COHERENT_MEM
ldr x0, =__COHERENT_RAM_START__ ldr x0, =__COHERENT_RAM_START__
ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__
bl zeromem16 bl zeromem
#endif #endif
/* -------------------------------------------- /* --------------------------------------------
......
/* /*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -104,7 +104,8 @@ SECTIONS ...@@ -104,7 +104,8 @@ SECTIONS
/* /*
* The .bss section gets initialised to 0 at runtime. * The .bss section gets initialised to 0 at runtime.
* Its base address must be 16-byte aligned. * Its base address should be 16-byte aligned for better performance of the
* zero-initialization code.
*/ */
.bss : ALIGN(16) { .bss : ALIGN(16) {
__BSS_START__ = .; __BSS_START__ = .;
......
/* /*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -347,7 +347,7 @@ static int load_auth_image_internal(unsigned int image_id, ...@@ -347,7 +347,7 @@ static int load_auth_image_internal(unsigned int image_id,
image_data->image_size); image_data->image_size);
if (rc != 0) { if (rc != 0) {
/* Authentication error, zero memory and flush it right away. */ /* Authentication error, zero memory and flush it right away. */
memset((void *)image_data->image_base, 0x00, zero_normalmem((void *)image_data->image_base,
image_data->image_size); image_data->image_size);
flush_dcache_range(image_data->image_base, flush_dcache_range(image_data->image_base,
image_data->image_size); image_data->image_size);
...@@ -543,7 +543,7 @@ static int load_auth_image_internal(meminfo_t *mem_layout, ...@@ -543,7 +543,7 @@ static int load_auth_image_internal(meminfo_t *mem_layout,
image_data->image_size); image_data->image_size);
if (rc != 0) { if (rc != 0) {
/* Authentication error, zero memory and flush it right away. */ /* Authentication error, zero memory and flush it right away. */
memset((void *)image_data->image_base, 0x00, zero_normalmem((void *)image_data->image_base,
image_data->image_size); image_data->image_size);
flush_dcache_range(image_data->image_base, flush_dcache_range(image_data->image_base,
image_data->image_size); image_data->image_size);
......
...@@ -1342,7 +1342,7 @@ All BL images share the following requirements: ...@@ -1342,7 +1342,7 @@ All BL images share the following requirements:
The following linker symbols are defined for this purpose: The following linker symbols are defined for this purpose:
* `__BSS_START__` Must be aligned on a 16-byte boundary. * `__BSS_START__`
* `__BSS_SIZE__` * `__BSS_SIZE__`
* `__COHERENT_RAM_START__` Must be aligned on a page-size boundary. * `__COHERENT_RAM_START__` Must be aligned on a page-size boundary.
* `__COHERENT_RAM_END__` Must be aligned on a page-size boundary. * `__COHERENT_RAM_END__` Must be aligned on a page-size boundary.
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <utils.h>
/* mbed TLS headers */ /* mbed TLS headers */
#include <mbedtls/asn1.h> #include <mbedtls/asn1.h>
...@@ -71,7 +72,7 @@ static void clear_temp_vars(void) ...@@ -71,7 +72,7 @@ static void clear_temp_vars(void)
{ {
#define ZERO_AND_CLEAN(x) \ #define ZERO_AND_CLEAN(x) \
do { \ do { \
memset(&x, 0, sizeof(x)); \ zeromem(&x, sizeof(x)); \
clean_dcache_range((uintptr_t)&x, sizeof(x)); \ clean_dcache_range((uintptr_t)&x, sizeof(x)); \
} while (0); } while (0);
...@@ -111,7 +112,7 @@ static int get_ext(const char *oid, void **ext, unsigned int *ext_len) ...@@ -111,7 +112,7 @@ static int get_ext(const char *oid, void **ext, unsigned int *ext_len)
MBEDTLS_ASN1_SEQUENCE); MBEDTLS_ASN1_SEQUENCE);
while (p < end) { while (p < end) {
memset(&extn_oid, 0x0, sizeof(extn_oid)); zeromem(&extn_oid, sizeof(extn_oid));
is_critical = 0; /* DEFAULT FALSE */ is_critical = 0; /* DEFAULT FALSE */
mbedtls_asn1_get_tag(&p, end, &len, MBEDTLS_ASN1_CONSTRUCTED | mbedtls_asn1_get_tag(&p, end, &len, MBEDTLS_ASN1_CONSTRUCTED |
......
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -36,6 +36,7 @@ ...@@ -36,6 +36,7 @@
#include <emmc.h> #include <emmc.h>
#include <errno.h> #include <errno.h>
#include <string.h> #include <string.h>
#include <utils.h>
static const emmc_ops_t *ops; static const emmc_ops_t *ops;
static unsigned int emmc_ocr_value; static unsigned int emmc_ocr_value;
...@@ -53,7 +54,7 @@ static int emmc_device_state(void) ...@@ -53,7 +54,7 @@ static int emmc_device_state(void)
int ret; int ret;
do { do {
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD13; cmd.cmd_idx = EMMC_CMD13;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET; cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
...@@ -71,7 +72,7 @@ static void emmc_set_ext_csd(unsigned int ext_cmd, unsigned int value) ...@@ -71,7 +72,7 @@ static void emmc_set_ext_csd(unsigned int ext_cmd, unsigned int value)
emmc_cmd_t cmd; emmc_cmd_t cmd;
int ret, state; int ret, state;
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD6; cmd.cmd_idx = EMMC_CMD6;
cmd.cmd_arg = EXTCSD_WRITE_BYTES | EXTCSD_CMD(ext_cmd) | cmd.cmd_arg = EXTCSD_WRITE_BYTES | EXTCSD_CMD(ext_cmd) |
EXTCSD_VALUE(value) | 1; EXTCSD_VALUE(value) | 1;
...@@ -107,14 +108,14 @@ static int emmc_enumerate(int clk, int bus_width) ...@@ -107,14 +108,14 @@ static int emmc_enumerate(int clk, int bus_width)
ops->init(); ops->init();
/* CMD0: reset to IDLE */ /* CMD0: reset to IDLE */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD0; cmd.cmd_idx = EMMC_CMD0;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
while (1) { while (1) {
/* CMD1: get OCR register */ /* CMD1: get OCR register */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD1; cmd.cmd_idx = EMMC_CMD1;
cmd.cmd_arg = OCR_SECTOR_MODE | OCR_VDD_MIN_2V7 | cmd.cmd_arg = OCR_SECTOR_MODE | OCR_VDD_MIN_2V7 |
OCR_VDD_MIN_1V7; OCR_VDD_MIN_1V7;
...@@ -127,14 +128,14 @@ static int emmc_enumerate(int clk, int bus_width) ...@@ -127,14 +128,14 @@ static int emmc_enumerate(int clk, int bus_width)
} }
/* CMD2: Card Identification */ /* CMD2: Card Identification */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD2; cmd.cmd_idx = EMMC_CMD2;
cmd.resp_type = EMMC_RESPONSE_R2; cmd.resp_type = EMMC_RESPONSE_R2;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
/* CMD3: Set Relative Address */ /* CMD3: Set Relative Address */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD3; cmd.cmd_idx = EMMC_CMD3;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET; cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
...@@ -142,7 +143,7 @@ static int emmc_enumerate(int clk, int bus_width) ...@@ -142,7 +143,7 @@ static int emmc_enumerate(int clk, int bus_width)
assert(ret == 0); assert(ret == 0);
/* CMD9: CSD Register */ /* CMD9: CSD Register */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD9; cmd.cmd_idx = EMMC_CMD9;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET; cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R2; cmd.resp_type = EMMC_RESPONSE_R2;
...@@ -151,7 +152,7 @@ static int emmc_enumerate(int clk, int bus_width) ...@@ -151,7 +152,7 @@ static int emmc_enumerate(int clk, int bus_width)
memcpy(&emmc_csd, &cmd.resp_data, sizeof(cmd.resp_data)); memcpy(&emmc_csd, &cmd.resp_data, sizeof(cmd.resp_data));
/* CMD7: Select Card */ /* CMD7: Select Card */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD7; cmd.cmd_idx = EMMC_CMD7;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET; cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
...@@ -181,7 +182,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size) ...@@ -181,7 +182,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
assert(ret == 0); assert(ret == 0);
if (is_cmd23_enabled()) { if (is_cmd23_enabled()) {
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
/* set block count */ /* set block count */
cmd.cmd_idx = EMMC_CMD23; cmd.cmd_idx = EMMC_CMD23;
cmd.cmd_arg = size / EMMC_BLOCK_SIZE; cmd.cmd_arg = size / EMMC_BLOCK_SIZE;
...@@ -189,7 +190,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size) ...@@ -189,7 +190,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD18; cmd.cmd_idx = EMMC_CMD18;
} else { } else {
if (size > EMMC_BLOCK_SIZE) if (size > EMMC_BLOCK_SIZE)
...@@ -213,7 +214,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size) ...@@ -213,7 +214,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
if (is_cmd23_enabled() == 0) { if (is_cmd23_enabled() == 0) {
if (size > EMMC_BLOCK_SIZE) { if (size > EMMC_BLOCK_SIZE) {
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD12; cmd.cmd_idx = EMMC_CMD12;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
...@@ -240,17 +241,17 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size) ...@@ -240,17 +241,17 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size)
if (is_cmd23_enabled()) { if (is_cmd23_enabled()) {
/* set block count */ /* set block count */
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD23; cmd.cmd_idx = EMMC_CMD23;
cmd.cmd_arg = size / EMMC_BLOCK_SIZE; cmd.cmd_arg = size / EMMC_BLOCK_SIZE;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD25; cmd.cmd_idx = EMMC_CMD25;
} else { } else {
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
if (size > EMMC_BLOCK_SIZE) if (size > EMMC_BLOCK_SIZE)
cmd.cmd_idx = EMMC_CMD25; cmd.cmd_idx = EMMC_CMD25;
else else
...@@ -272,7 +273,7 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size) ...@@ -272,7 +273,7 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size)
if (is_cmd23_enabled() == 0) { if (is_cmd23_enabled() == 0) {
if (size > EMMC_BLOCK_SIZE) { if (size > EMMC_BLOCK_SIZE) {
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD12; cmd.cmd_idx = EMMC_CMD12;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
...@@ -291,21 +292,21 @@ size_t emmc_erase_blocks(int lba, size_t size) ...@@ -291,21 +292,21 @@ size_t emmc_erase_blocks(int lba, size_t size)
assert(ops != 0); assert(ops != 0);
assert((size != 0) && ((size % EMMC_BLOCK_SIZE) == 0)); assert((size != 0) && ((size % EMMC_BLOCK_SIZE) == 0));
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD35; cmd.cmd_idx = EMMC_CMD35;
cmd.cmd_arg = lba; cmd.cmd_arg = lba;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD36; cmd.cmd_idx = EMMC_CMD36;
cmd.cmd_arg = lba + (size / EMMC_BLOCK_SIZE) - 1; cmd.cmd_arg = lba + (size / EMMC_BLOCK_SIZE) - 1;
cmd.resp_type = EMMC_RESPONSE_R1; cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
assert(ret == 0); assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t)); zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD38; cmd.cmd_idx = EMMC_CMD38;
cmd.resp_type = EMMC_RESPONSE_R1B; cmd.resp_type = EMMC_RESPONSE_R1B;
ret = ops->send_cmd(&cmd); ret = ops->send_cmd(&cmd);
......
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -36,6 +36,7 @@ ...@@ -36,6 +36,7 @@
#include <io_storage.h> #include <io_storage.h>
#include <platform_def.h> #include <platform_def.h>
#include <string.h> #include <string.h>
#include <utils.h>
typedef struct { typedef struct {
io_block_dev_spec_t *dev_spec; io_block_dev_spec_t *dev_spec;
...@@ -135,8 +136,8 @@ static int free_dev_info(io_dev_info_t *dev_info) ...@@ -135,8 +136,8 @@ static int free_dev_info(io_dev_info_t *dev_info)
result = find_first_block_state(state->dev_spec, &index); result = find_first_block_state(state->dev_spec, &index);
if (result == 0) { if (result == 0) {
/* free if device info is valid */ /* free if device info is valid */
memset(state, 0, sizeof(block_dev_state_t)); zeromem(state, sizeof(block_dev_state_t));
memset(dev_info, 0, sizeof(io_dev_info_t)); zeromem(dev_info, sizeof(io_dev_info_t));
--block_dev_count; --block_dev_count;
} }
......
/* /*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -40,6 +40,7 @@ ...@@ -40,6 +40,7 @@
#include <platform_def.h> #include <platform_def.h>
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <utils.h>
#include <uuid.h> #include <uuid.h>
/* Useful for printing UUIDs when debugging.*/ /* Useful for printing UUIDs when debugging.*/
...@@ -351,7 +352,7 @@ static int fip_file_close(io_entity_t *entity) ...@@ -351,7 +352,7 @@ static int fip_file_close(io_entity_t *entity)
* If we had malloc() we would free() here. * If we had malloc() we would free() here.
*/ */
if (current_file.entry.offset_address != 0) { if (current_file.entry.offset_address != 0) {
memset(&current_file, 0, sizeof(current_file)); zeromem(&current_file, sizeof(current_file));
} }
/* Clear the Entity info. */ /* Clear the Entity info. */
......
/* /*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#include <io_driver.h> #include <io_driver.h>
#include <io_storage.h> #include <io_storage.h>
#include <string.h> #include <string.h>
#include <utils.h>
/* As we need to be able to keep state for seek, only one file can be open /* As we need to be able to keep state for seek, only one file can be open
* at a time. Make this a structure and point to the entity->info. When we * at a time. Make this a structure and point to the entity->info. When we
...@@ -231,7 +232,7 @@ static int memmap_block_close(io_entity_t *entity) ...@@ -231,7 +232,7 @@ static int memmap_block_close(io_entity_t *entity)
entity->info = 0; entity->info = 0;
/* This would be a mem free() if we had malloc.*/ /* This would be a mem free() if we had malloc.*/
memset((void *)&current_file, 0, sizeof(current_file)); zeromem((void *)&current_file, sizeof(current_file));
return 0; return 0;
} }
......
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#include <errno.h> #include <errno.h>
#include <gpt.h> #include <gpt.h>
#include <string.h> #include <string.h>
#include <utils.h>
static int unicode_to_ascii(unsigned short *str_in, unsigned char *str_out) static int unicode_to_ascii(unsigned short *str_in, unsigned char *str_out)
{ {
...@@ -65,7 +66,7 @@ int parse_gpt_entry(gpt_entry_t *gpt_entry, partition_entry_t *entry) ...@@ -65,7 +66,7 @@ int parse_gpt_entry(gpt_entry_t *gpt_entry, partition_entry_t *entry)
return -EINVAL; return -EINVAL;
} }
memset(entry, 0, sizeof(partition_entry_t)); zeromem(entry, sizeof(partition_entry_t));
result = unicode_to_ascii(gpt_entry->name, (uint8_t *)entry->name); result = unicode_to_ascii(gpt_entry->name, (uint8_t *)entry->name);
if (result != 0) { if (result != 0) {
return result; return result;
......
/* /*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
...@@ -252,12 +252,12 @@ ...@@ -252,12 +252,12 @@
ldr x0, =__BSS_START__ ldr x0, =__BSS_START__
ldr x1, =__BSS_SIZE__ ldr x1, =__BSS_SIZE__
bl zeromem16 bl zeromem
#if USE_COHERENT_MEM #if USE_COHERENT_MEM
ldr x0, =__COHERENT_RAM_START__ ldr x0, =__COHERENT_RAM_START__
ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__
bl zeromem16 bl zeromem
#endif #endif
#ifdef IMAGE_BL1 #ifdef IMAGE_BL1
......
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