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adam.huang
Arm Trusted Firmware
Commits
157650c7
Unverified
Commit
157650c7
authored
Nov 03, 2017
by
davidcunado-arm
Committed by
GitHub
Nov 03, 2017
Browse files
Merge pull request #1142 from etienne-lms/qemu-int
qemu: update deprecated interrupt registering
parents
3de7d58e
ad3803bf
Changes
1
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plat/qemu/qemu_bl31_setup.c
View file @
157650c7
...
@@ -7,6 +7,7 @@
...
@@ -7,6 +7,7 @@
#include <assert.h>
#include <assert.h>
#include <bl_common.h>
#include <bl_common.h>
#include <console.h>
#include <console.h>
#include <gic_common.h>
#include <gicv2.h>
#include <gicv2.h>
#include <platform_def.h>
#include <platform_def.h>
#include "qemu_private.h"
#include "qemu_private.h"
...
@@ -112,22 +113,40 @@ void bl31_plat_arch_setup(void)
...
@@ -112,22 +113,40 @@ void bl31_plat_arch_setup(void)
BL_COHERENT_RAM_BASE
,
BL_COHERENT_RAM_END
);
BL_COHERENT_RAM_BASE
,
BL_COHERENT_RAM_END
);
}
}
static
const
unsigned
int
irq_sec_array
[]
=
{
/******************************************************************************
QEMU_IRQ_SEC_SGI_0
,
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
QEMU_IRQ_SEC_SGI_1
,
* interrupts.
QEMU_IRQ_SEC_SGI_2
,
*****************************************************************************/
QEMU_IRQ_SEC_SGI_3
,
#define PLATFORM_G1S_PROPS(grp) \
QEMU_IRQ_SEC_SGI_4
,
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_0, GIC_HIGHEST_SEC_PRIORITY, \
QEMU_IRQ_SEC_SGI_5
,
grp, GIC_INTR_CFG_EDGE), \
QEMU_IRQ_SEC_SGI_6
,
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_1, GIC_HIGHEST_SEC_PRIORITY, \
QEMU_IRQ_SEC_SGI_7
,
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_2, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_3, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_4, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_5, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, \
grp, GIC_INTR_CFG_EDGE)
#define PLATFORM_G0_PROPS(grp)
static
const
interrupt_prop_t
qemu_interrupt_props
[]
=
{
PLATFORM_G1S_PROPS
(
GICV2_INTR_GROUP0
),
PLATFORM_G0_PROPS
(
GICV2_INTR_GROUP0
)
};
};
static
const
struct
gicv2_driver_data
plat_gicv2_driver_data
=
{
static
const
struct
gicv2_driver_data
plat_gicv2_driver_data
=
{
.
gicd_base
=
GICD_BASE
,
.
gicd_base
=
GICD_BASE
,
.
gicc_base
=
GICC_BASE
,
.
gicc_base
=
GICC_BASE
,
.
g0_
interrupt_
num
=
ARRAY_SIZE
(
irq_sec_array
)
,
.
interrupt_
props
=
qemu_interrupt_props
,
.
g0_
interrupt_
array
=
irq_sec_array
,
.
interrupt_
props_num
=
ARRAY_SIZE
(
qemu_interrupt_props
)
,
};
};
void
bl31_platform_setup
(
void
)
void
bl31_platform_setup
(
void
)
...
...
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