RAS: SGI575: Add platform specific RAS changes

Add platform specific changes needed to add support for the RAS
feature on SGI575 platform, including adding a mapping for the
CPER buffer being used on SGI575 platform.

Change-Id: I01a982e283609b5c48661307906346fa2738a43b
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>

plat/arm/css/sgi/include/platform_def.h

@@ -15,6 +15,7 @@
 #include <css_def.h>
 #include <soc_css_def.h>
 #include <utils_def.h>
+#include <xlat_tables_defs.h>
 
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER	4
 
@@ -94,11 +95,42 @@
 
 #if RAS_EXTENSION
 /* Allocate 128KB for CPER buffers */
-#define PLAT_SP_BUF_BASE		ULL(0x20000)
+#define PLAT_SP_BUF_BASE			ULL(0x20000)
+
+#define PLAT_ARM_SP_IMAGE_STACK_BASE		(ARM_SP_IMAGE_NS_BUF_BASE + \
+						ARM_SP_IMAGE_NS_BUF_SIZE + \
+						PLAT_SP_BUF_BASE)
+
+/* Platform specific SMC FID's used for RAS */
+#define SP_DMC_ERROR_INJECT_EVENT_AARCH64	0xC4000042
+#define SP_DMC_ERROR_INJECT_EVENT_AARCH32	0x84000042
+
+#define SP_DMC_ERROR_OVERFLOW_EVENT_AARCH64	0xC4000043
+#define SP_DMC_ERROR_OVERFLOW_EVENT_AARCH32	0x84000043
+
+#define SP_DMC_ERROR_ECC_EVENT_AARCH64		0xC4000044
+#define SP_DMC_ERROR_ECC_EVENT_AARCH32		0x84000044
+
+/* ARM SDEI dynamic shared event numbers */
+#define SGI_SDEI_DS_EVENT_0			804
+#define SGI_SDEI_DS_EVENT_1			805
+
+#define PLAT_ARM_PRIVATE_SDEI_EVENTS	\
+	SDEI_DEFINE_EVENT_0(ARM_SDEI_SGI), \
+	SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_0, SDEI_MAPF_CRITICAL), \
+	SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_1, SDEI_MAPF_CRITICAL),
+#define PLAT_ARM_SHARED_SDEI_EVENTS
+
+#define ARM_SP_CPER_BUF_BASE			(ARM_SP_IMAGE_NS_BUF_BASE + \
+						ARM_SP_IMAGE_NS_BUF_SIZE)
+#define ARM_SP_CPER_BUF_SIZE			ULL(0x20000)
+#define ARM_SP_CPER_BUF_MMAP			MAP_REGION2(		\
+						ARM_SP_CPER_BUF_BASE,	\
+						ARM_SP_CPER_BUF_BASE,	\
+						ARM_SP_CPER_BUF_SIZE,	\
+						MT_RW_DATA | MT_NS | MT_USER, \
+						PAGE_SIZE)
 
-#define PLAT_ARM_SP_IMAGE_STACK_BASE	(ARM_SP_IMAGE_NS_BUF_BASE +	\
-					 ARM_SP_IMAGE_NS_BUF_SIZE +	\
-					 PLAT_SP_BUF_BASE)
 #else
 #define PLAT_ARM_SP_IMAGE_STACK_BASE	(ARM_SP_IMAGE_NS_BUF_BASE +	\
 					 ARM_SP_IMAGE_NS_BUF_SIZE)

plat/arm/css/sgi/sgi_plat.c

@@ -10,6 +10,7 @@
 #include <ccn.h>
 #include <debug.h>
 #include <plat_arm.h>
+#include <platform_def.h>
 #include <platform.h>
 #include <secure_partition.h>
 #include "../../../../bl1/bl1_private.h"
@@ -83,6 +84,7 @@ const mmap_region_t plat_arm_secure_partition_mmap[] = {
 	PLAT_ARM_SECURE_MAP_DEVICE,
 	ARM_SP_IMAGE_MMAP,
 	ARM_SP_IMAGE_NS_BUF_MMAP,
+	ARM_SP_CPER_BUF_MMAP,
 	ARM_SP_IMAGE_RW_MMAP,
 	ARM_SPM_BUF_EL0_MMAP,
 	{0}

plat/arm/css/sgi/sgi_ras.c

@@ -32,6 +32,47 @@ typedef struct mm_communicate_header {
 	uint8_t		data[8];
 } mm_communicate_header_t;
 
+struct sgi_ras_ev_map sgi575_ras_map[] = {
+
+	/* DMC620 error overflow interrupt*/
+	{SP_DMC_ERROR_OVERFLOW_EVENT_AARCH64, SGI_SDEI_DS_EVENT_1, 33},
+
+	/* DMC620 error ECC error interrupt*/
+	{SP_DMC_ERROR_ECC_EVENT_AARCH64, SGI_SDEI_DS_EVENT_0, 35},
+};
+
+#define SGI575_RAS_MAP_SIZE	ARRAY_SIZE(sgi575_ras_map)
+
+struct err_record_info sgi_err_records[] = {
+	{
+		.handler = &sgi_ras_intr_handler,
+	},
+};
+
+struct ras_interrupt sgi_ras_interrupts[] = {
+	{
+		.intr_number = 33,
+		.err_record = &sgi_err_records[0],
+	},
+	{
+		.intr_number = 35,
+		.err_record = &sgi_err_records[0],
+	}
+};
+
+REGISTER_ERR_RECORD_INFO(sgi_err_records);
+REGISTER_RAS_INTERRUPTS(sgi_ras_interrupts);
+
+static struct sgi_ras_ev_map *plat_sgi_get_ras_ev_map(void)
+{
+	return sgi575_ras_map;
+}
+
+static int plat_sgi_get_ras_ev_map_size(void)
+{
+	return SGI575_RAS_MAP_SIZE;
+}
+
 /*
  * Find event mapping for a given interrupt number: On success, returns pointer
  * to the event mapping. On error, returns NULL.