Tegra194: add memory barriers during DRAM to SysRAM copy

This patch adds memory barriers to the trampoline code copying TZDRAM
contents to SysRAM during exit from System Suspend. These barriers
make sure that all the copies go through before we start executing in
SysRAM.

Reported by: Nathan Tuck <ntuck@nvidia.com>

Change-Id: I3fd2964086b6c0e044cc4165051a4801440db9cd
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

plat/nvidia/tegra/soc/t194/plat_trampoline.S

@@ -58,6 +58,13 @@ m_loop1:
 	subs	x2, x2, #1
 	b.ne	m_loop1
 
+	/*
+	 * Synchronization barriers to make sure that memory is flushed out
+	 * before we start execution in SysRAM.
+	 */
+	dsb	sy
+	isb
+
 boot_cpu:
 	adr	x0, __tegra194_cpu_reset_handler_data
 	ldr	x0, [x0]