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adam.huang
Arm Trusted Firmware
Commits
1ab2dc1a
Commit
1ab2dc1a
authored
Jan 09, 2020
by
Manish Pandey
Committed by
TrustedFirmware Code Review
Jan 09, 2020
Browse files
Merge "Remove redundant declarations." into integration
parents
6e94d56a
7a05f06a
Changes
10
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Side-by-side
drivers/auth/auth_mod.c
View file @
1ab2dc1a
...
...
@@ -30,9 +30,6 @@
#pragma weak plat_set_nv_ctr2
/* Pointer to CoT */
extern
const
auth_img_desc_t
*
const
*
const
cot_desc_ptr
;
extern
unsigned
int
auth_img_flags
[
MAX_NUMBER_IDS
];
static
int
cmp_auth_param_type_desc
(
const
auth_param_type_desc_t
*
a
,
const
auth_param_type_desc_t
*
b
)
...
...
drivers/renesas/rcar/io/io_rcar.c
View file @
1ab2dc1a
...
...
@@ -28,9 +28,6 @@
extern
int32_t
plat_get_drv_source
(
uint32_t
id
,
uintptr_t
*
dev
,
uintptr_t
*
image_spec
);
extern
int
auth_mod_verify_img
(
unsigned
int
img_id
,
void
*
ptr
,
unsigned
int
len
);
static
int32_t
rcar_dev_open
(
const
uintptr_t
dev_spec
__attribute__
((
unused
)),
io_dev_info_t
**
dev_info
);
static
int32_t
rcar_dev_close
(
io_dev_info_t
*
dev_info
);
...
...
plat/imx/imx8m/include/imx8m_psci.h
View file @
1ab2dc1a
...
...
@@ -15,13 +15,9 @@ int imx_pwr_domain_on(u_register_t mpidr);
void
imx_pwr_domain_on_finish
(
const
psci_power_state_t
*
target_state
);
void
imx_pwr_domain_off
(
const
psci_power_state_t
*
target_state
);
int
imx_validate_ns_entrypoint
(
uintptr_t
ns_entrypoint
);
int
imx_validate_power_state
(
unsigned
int
power_state
,
psci_power_state_t
*
rq_state
);
void
imx_cpu_standby
(
plat_local_state_t
cpu_state
);
void
imx_domain_suspend
(
const
psci_power_state_t
*
target_state
);
void
imx_domain_suspend_finish
(
const
psci_power_state_t
*
target_state
);
void
imx_get_sys_suspend_power_state
(
psci_power_state_t
*
req_state
);
void
__dead2
imx_system_reset
(
void
);
void
__dead2
imx_system_off
(
void
);
void
__dead2
imx_pwr_domain_pwr_down_wfi
(
const
psci_power_state_t
*
target_state
);
#endif
/* IMX8M_PSCI_H */
plat/intel/soc/agilex/include/agilex_system_manager.h
View file @
1ab2dc1a
...
...
@@ -73,7 +73,6 @@
#define DISABLE_BRIDGE_FIREWALL 0x0ffe0101
#define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24))
void
enable_nonsecure_access
(
void
);
void
enable_ns_bridge_access
(
void
);
#endif
plat/intel/soc/stratix10/include/s10_system_manager.h
View file @
1ab2dc1a
...
...
@@ -69,5 +69,3 @@
#define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24))
void
enable_nonsecure_access
(
void
);
plat/mediatek/mt8173/drivers/spm/spm.h
View file @
1ab2dc1a
...
...
@@ -320,7 +320,6 @@ void spm_register_init(void);
void
spm_go_to_hotplug
(
void
);
void
spm_init_event_vector
(
const
struct
pcm_desc
*
pcmdesc
);
void
spm_kick_im_to_fetch
(
const
struct
pcm_desc
*
pcmdesc
);
void
spm_set_sysclk_settle
(
void
);
int
is_mcdi_ready
(
void
);
int
is_hotplug_ready
(
void
);
int
is_suspend_ready
(
void
);
...
...
plat/nvidia/tegra/include/tegra_private.h
View file @
1ab2dc1a
...
...
@@ -137,7 +137,6 @@ int32_t bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
void
tegra_delay_timer_init
(
void
);
void
tegra_secure_entrypoint
(
void
);
void
tegra186_cpu_reset_handler
(
void
);
/* Declarations for tegra_sip_calls.c */
uintptr_t
tegra_sip_handler
(
uint32_t
smc_fid
,
...
...
plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h
View file @
1ab2dc1a
...
...
@@ -66,7 +66,6 @@ uint64_t nvg_get_result(void);
uint64_t
nvg_cache_clean
(
void
);
uint64_t
nvg_cache_clean_inval
(
void
);
uint64_t
nvg_cache_inval_all
(
void
);
int32_t
nvg_roc_clean_cache_trbits
(
void
);
void
nvg_enable_strict_checking_mode
(
void
);
/* MCE helper functions */
...
...
plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
View file @
1ab2dc1a
...
...
@@ -26,7 +26,6 @@
#include <tegra_platform.h>
#include <tegra_private.h>
extern
void
tegra194_cpu_reset_handler
(
void
);
extern
uint32_t
__tegra194_cpu_reset_handler_data
,
__tegra194_cpu_reset_handler_end
;
...
...
plat/rockchip/rk3328/drivers/soc/soc.h
View file @
1ab2dc1a
...
...
@@ -16,8 +16,6 @@
#define TIMER_INTSTATUS 0x18
#define TIMER_EN 0x1
extern
const
unsigned
char
rockchip_power_domain_tree_desc
[];
/**************************** read/write **************************************/
#ifndef BITS_WMSK
#define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT))
...
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