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adam.huang
Arm Trusted Firmware
Commits
1d24eb33
Commit
1d24eb33
authored
3 years ago
by
Bipin Ravi
Committed by
TrustedFirmware Code Review
3 years ago
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Merge "errata: workaround for Neoverse V1 errata 1774420" into integration
parents
ddbc09ab
4789cf66
Changes
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4 changed files
docs/design/cpu-specific-build-macros.rst
+4
-0
docs/design/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/neoverse_v1.h
+1
-0
include/lib/cpus/aarch64/neoverse_v1.h
lib/cpus/aarch64/neoverse_v1.S
+37
-3
lib/cpus/aarch64/neoverse_v1.S
lib/cpus/cpu-ops.mk
+8
-0
lib/cpus/cpu-ops.mk
with
50 additions
and
3 deletions
+50
-3
docs/design/cpu-specific-build-macros.rst
View file @
1d24eb33
...
...
@@ -325,6 +325,10 @@ For Neoverse N1, the following errata build flags are defined :
For Neoverse V1, the following errata build flags are defined :
- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1.
- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1.
...
...
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include/lib/cpus/aarch64/neoverse_v1.h
View file @
1d24eb33
...
...
@@ -13,6 +13,7 @@
* CPU Extended Control register specific definitions.
******************************************************************************/
#define NEOVERSE_V1_CPUECTLR_EL1 S3_0_C15_C1_4
#define NEOVERSE_V1_CPUECTLR_EL1_BIT_53 (ULL(1) << 53)
/*******************************************************************************
* CPU Power Control register specific definitions
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lib/cpus/aarch64/neoverse_v1.S
View file @
1d24eb33
/*
*
Copyright
(
c
)
2019
-
202
0
,
ARM
Limited
.
All
rights
reserved
.
*
Copyright
(
c
)
2019
-
202
1
,
ARM
Limited
.
All
rights
reserved
.
*
*
SPDX
-
License
-
Identifier
:
BSD
-
3
-
Clause
*/
...
...
@@ -21,6 +21,34 @@
#error "Neoverse-V1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
/
*
--------------------------------------------------
*
Errata
Workaround
for
Neoverse
V1
Errata
#
1774420
.
*
This
applies
to
revisions
r0p0
and
r1p0
,
fixed
in
r1p1
.
*
x0
:
variant
[
4
:
7
]
and
revision
[
0
:
3
]
of
current
cpu
.
*
Shall
clobber
:
x0
-
x17
*
--------------------------------------------------
*/
func
errata_neoverse_v1_1774420_wa
/
*
Check
workaround
compatibility
.
*/
mov
x17
,
x30
bl
check_errata_1774420
cbz
x0
,
1
f
/
*
Set
bit
53
in
CPUECTLR_EL1
*/
mrs
x1
,
NEOVERSE_V1_CPUECTLR_EL1
orr
x1
,
x1
,
#
NEOVERSE_V1_CPUECTLR_EL1_BIT_53
msr
NEOVERSE_V1_CPUECTLR_EL1
,
x1
isb
1
:
ret
x17
endfunc
errata_neoverse_v1_1774420_wa
func
check_errata_1774420
/
*
Applies
to
r0p0
and
r1p0
.
*/
mov
x1
,
#
0x10
b
cpu_rev_var_ls
endfunc
check_errata_1774420
/
*
--------------------------------------------------
*
Errata
Workaround
for
Neoverse
V1
Errata
#
1791573
.
*
This
applies
to
revisions
r0p0
and
r1p0
,
fixed
in
r1p1
.
...
...
@@ -35,9 +63,9 @@ func errata_neoverse_v1_1791573_wa
cbz
x0
,
1
f
/
*
Set
bit
2
in
ACTLR2_EL1
*/
mrs
x1
,
NEOVERSE_V1_ACTLR2_EL1
mrs
x1
,
NEOVERSE_V1_ACTLR2_EL1
orr
x1
,
x1
,
#
NEOVERSE_V1_ACTLR2_EL1_BIT_2
msr
NEOVERSE_V1_ACTLR2_EL1
,
x1
msr
NEOVERSE_V1_ACTLR2_EL1
,
x1
isb
1
:
ret
x17
...
...
@@ -134,6 +162,7 @@ func neoverse_v1_errata_report
*
Report
all
errata
.
The
revision
-
variant
information
is
passed
to
*
checking
functions
of
each
errata
.
*/
report_errata
ERRATA_V1_1774420
,
neoverse_v1
,
1774420
report_errata
ERRATA_V1_1791573
,
neoverse_v1
,
1791573
report_errata
ERRATA_V1_1940577
,
neoverse_v1
,
1940577
...
...
@@ -149,6 +178,11 @@ func neoverse_v1_reset_func
msr
SSBS
,
xzr
isb
#if ERRATA_V1_1774420
mov
x0
,
x18
bl
errata_neoverse_v1_1774420_wa
#endif
#if ERRATA_V1_1791573
mov
x0
,
x18
bl
errata_neoverse_v1_1791573_wa
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...
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lib/cpus/cpu-ops.mk
View file @
1d24eb33
...
...
@@ -372,6 +372,10 @@ ERRATA_N1_1868343 ?=0
# exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround.
ERRATA_N1_1946160
?=
0
# Flag to apply erratum 1774420 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1774420
?=
0
# Flag to apply erratum 1791573 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1791573
?=
0
...
...
@@ -685,6 +689,10 @@ $(eval $(call add_define,ERRATA_N1_1868343))
$(eval
$(call
assert_boolean,ERRATA_N1_1946160))
$(eval
$(call
add_define,ERRATA_N1_1946160))
# Process ERRATA_V1_1774420 flag
$(eval
$(call
assert_boolean,ERRATA_V1_1774420))
$(eval
$(call
add_define,ERRATA_V1_1774420))
# Process ERRATA_V1_1791573 flag
$(eval
$(call
assert_boolean,ERRATA_V1_1791573))
$(eval
$(call
add_define,ERRATA_V1_1791573))
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