Commit 2cd2e399 authored by Steven Kao's avatar Steven Kao Committed by Varun Wadekar
Browse files

Tegra194: read-modify-write ACTLR_ELx registers


This patch changes direct writes to ACTLR_ELx registers to use
read-modify-write instead.

Change-Id: I536dce75c01356ce054dd2edee80875e56164439
Signed-off-by: default avatarSteven Kao <skao@nvidia.com>
Showing with 4 additions and 15 deletions
+4 -15
...@@ -27,20 +27,6 @@ ...@@ -27,20 +27,6 @@
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE 1
#define PLAT_MAX_OFF_STATE 8 #define PLAT_MAX_OFF_STATE 8
/*******************************************************************************
* Implementation defined ACTLR_EL3 bit definitions
******************************************************************************/
#define ACTLR_EL3_L2ACTLR_BIT (1 << 6)
#define ACTLR_EL3_L2ECTLR_BIT (1 << 5)
#define ACTLR_EL3_L2CTLR_BIT (1 << 4)
#define ACTLR_EL3_CPUECTLR_BIT (1 << 1)
#define ACTLR_EL3_CPUACTLR_BIT (1 << 0)
#define ACTLR_EL3_ENABLE_ALL_ACCESS (ACTLR_EL3_L2ACTLR_BIT | \
ACTLR_EL3_L2ECTLR_BIT | \
ACTLR_EL3_L2CTLR_BIT | \
ACTLR_EL3_CPUECTLR_BIT | \
ACTLR_EL3_CPUACTLR_BIT)
/******************************************************************************* /*******************************************************************************
* Secure IRQ definitions * Secure IRQ definitions
******************************************************************************/ ******************************************************************************/
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <mce_private.h> #include <mce_private.h>
#include <platform_def.h> #include <platform_def.h>
#include <t194_nvg.h> #include <t194_nvg.h>
#include <tegra_private.h>
extern void nvg_set_request_data(uint64_t req, uint64_t data); extern void nvg_set_request_data(uint64_t req, uint64_t data);
extern void nvg_set_request(uint64_t req); extern void nvg_set_request(uint64_t req);
...@@ -342,6 +343,7 @@ int32_t nvg_roc_clean_cache_trbits(void) ...@@ -342,6 +343,7 @@ int32_t nvg_roc_clean_cache_trbits(void)
int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time) int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time)
{ {
int32_t ret = 0; int32_t ret = 0;
uint64_t val = 0ULL;
/* check for allowed power state */ /* check for allowed power state */
if ((state != (uint32_t)TEGRA_NVG_CORE_C0) && if ((state != (uint32_t)TEGRA_NVG_CORE_C0) &&
...@@ -356,7 +358,8 @@ int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time) ...@@ -356,7 +358,8 @@ int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time)
nvg_set_wake_time(wake_time); nvg_set_wake_time(wake_time);
/* set the core cstate */ /* set the core cstate */
write_actlr_el1(state); val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK;
write_actlr_el1(val | (uint64_t)state);
} }
return ret; return ret;
......
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