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Commit 31d5e7f5 authored by danh-arm's avatar danh-arm
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Merge pull request #467 from jcastillo-arm/jc/tbb_oid 

Apply new image terminology
parents a84deb9c d178637d
Hide whitespace changes
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include/common/firmware_image_package.h
View file @ 31d5e7f5
......@@ -49,7 +49,7 @@
{0xb28a4071, 0xd618, 0x4c87, 0x8b, 0x2e, {0xc6, 0xdc, 0xcd, 0x50, 0xf0, 0x96} }
#define UUID_TRUSTED_BOOT_FIRMWARE_BL2 \
{0x0becf95f, 0x224d, 0x4d3e, 0xa5, 0x44, {0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a} }
#define UUID_SCP_FIRMWARE_BL30 \
#define UUID_SCP_FIRMWARE_SCP_BL2 \
{0x3dfd6697, 0xbe89, 0x49e8, 0xae, 0x5d, {0x78, 0xa1, 0x40, 0x60, 0x82, 0x13} }
#define UUID_EL3_RUNTIME_FIRMWARE_BL31 \
{0x6d08d447, 0xfe4c, 0x4698, 0x9b, 0x95, {0x29, 0x50, 0xcb, 0xbd, 0x5a, 0x00} }
......@@ -64,24 +64,24 @@
{0x90e87e82, 0x60f8, 0x11e4, 0xa1, 0xb4, {0x77, 0x7a, 0x21, 0xb4, 0xf9, 0x4c} }
#define UUID_NON_TRUSTED_WORLD_KEY_CERT \
{0x3d87671c, 0x635f, 0x11e4, 0x97, 0x8d, {0x27, 0xc0, 0xc7, 0x14, 0x8a, 0xbd} }
#define UUID_SCP_FIRMWARE_BL30_KEY_CERT \
#define UUID_SCP_FW_KEY_CERT \
{0xa1214202, 0x60f8, 0x11e4, 0x8d, 0x9b, {0xf3, 0x3c, 0x0e, 0x15, 0xa0, 0x14} }
#define UUID_EL3_RUNTIME_FIRMWARE_BL31_KEY_CERT \
#define UUID_SOC_FW_KEY_CERT \
{0xccbeb88a, 0x60f9, 0x11e4, 0x9a, 0xd0, {0xeb, 0x48, 0x22, 0xd8, 0xdc, 0xf8} }
#define UUID_SECURE_PAYLOAD_BL32_KEY_CERT \
#define UUID_TRUSTED_OS_FW_KEY_CERT \
{0x03d67794, 0x60fb, 0x11e4, 0x85, 0xdd, {0xb7, 0x10, 0x5b, 0x8c, 0xee, 0x04} }
#define UUID_NON_TRUSTED_FIRMWARE_BL33_KEY_CERT \
#define UUID_NON_TRUSTED_FW_KEY_CERT \
{0x2a83d58a, 0x60fb, 0x11e4, 0x8a, 0xaf, {0xdf, 0x30, 0xbb, 0xc4, 0x98, 0x59} }
/* Content certificates */
#define UUID_TRUSTED_BOOT_FIRMWARE_BL2_CERT \
#define UUID_TRUSTED_BOOT_FW_CERT \
{0xea69e2d6, 0x635d, 0x11e4, 0x8d, 0x8c, {0x9f, 0xba, 0xbe, 0x99, 0x56, 0xa5} }
#define UUID_SCP_FIRMWARE_BL30_CERT \
#define UUID_SCP_FW_CONTENT_CERT \
{0x046fbe44, 0x635e, 0x11e4, 0xb2, 0x8b, {0x73, 0xd8, 0xea, 0xae, 0x96, 0x56} }
#define UUID_EL3_RUNTIME_FIRMWARE_BL31_CERT \
#define UUID_SOC_FW_CONTENT_CERT \
{0x200cb2e2, 0x635e, 0x11e4, 0x9c, 0xe8, {0xab, 0xcc, 0xf9, 0x2b, 0xb6, 0x66} }
#define UUID_SECURE_PAYLOAD_BL32_CERT \
#define UUID_TRUSTED_OS_FW_CONTENT_CERT \
{0x11449fa4, 0x635e, 0x11e4, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} }
#define UUID_NON_TRUSTED_FIRMWARE_BL33_CERT \
#define UUID_NON_TRUSTED_FW_CONTENT_CERT \
{0xf3c1c48e, 0x635d, 0x11e4, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} }
typedef struct fip_toc_header {
......
include/common/tbbr/tbbr_img_def.h
View file @ 31d5e7f5
......@@ -37,8 +37,8 @@
/* Trusted Boot Firmware BL2 */
#define BL2_IMAGE_ID 1
/* SCP Firmware BL3-0 */
#define BL30_IMAGE_ID 2
/* SCP Firmware SCP_BL2 */
#define SCP_BL2_IMAGE_ID 2
/* EL3 Runtime Firmware BL31 */
#define BL31_IMAGE_ID 3
......@@ -50,18 +50,18 @@
#define BL33_IMAGE_ID 5
/* Certificates */
#define BL2_CERT_ID 6
#define TRUSTED_BOOT_FW_CERT_ID 6
#define TRUSTED_KEY_CERT_ID 7
#define BL30_KEY_CERT_ID 8
#define BL31_KEY_CERT_ID 9
#define BL32_KEY_CERT_ID 10
#define BL33_KEY_CERT_ID 11
#define SCP_FW_KEY_CERT_ID 8
#define SOC_FW_KEY_CERT_ID 9
#define TRUSTED_OS_FW_KEY_CERT_ID 10
#define NON_TRUSTED_FW_KEY_CERT_ID 11
#define BL30_CERT_ID 12
#define BL31_CERT_ID 13
#define BL32_CERT_ID 14
#define BL33_CERT_ID 15
#define SCP_FW_CONTENT_CERT_ID 12
#define SOC_FW_CONTENT_CERT_ID 13
#define TRUSTED_OS_FW_CONTENT_CERT_ID 14
#define NON_TRUSTED_FW_CONTENT_CERT_ID 15
/* Non-Trusted ROM Firmware NS_BL1U */
#define NS_BL1U_IMAGE_ID 16
......
include/lib/cpus/aarch64/cpu_macros.S
View file @ 31d5e7f5
......@@ -46,7 +46,7 @@ CPU_MIDR: /* cpu_ops midr */
CPU_RESET_FUNC: /* cpu_ops reset_func */
.space 8
#endif
#if IMAGE_BL31 /* The power down core and cluster is needed only in BL3-1 */
#if IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */
CPU_PWR_DWN_CORE: /* cpu_ops core_pwr_dwn */
.space 8
CPU_PWR_DWN_CLUSTER: /* cpu_ops cluster_pwr_dwn */
......
include/plat/arm/board/common/board_arm_oid.h
View file @ 31d5e7f5
......@@ -44,9 +44,9 @@
/* TrustedFirmwareNVCounter - Non-volatile counter extension */
#define TZ_FW_NVCOUNTER_OID "1.3.6.1.4.1.4128.2100.1"
#define TRUSTED_FW_NVCOUNTER_OID "1.3.6.1.4.1.4128.2100.1"
/* NonTrustedFirmwareNVCounter - Non-volatile counter extension */
#define NTZ_FW_NVCOUNTER_OID "1.3.6.1.4.1.4128.2100.2"
#define NON_TRUSTED_FW_NVCOUNTER_OID "1.3.6.1.4.1.4128.2100.2"
/*
......@@ -54,11 +54,11 @@
*/
/* APFirmwareUpdaterConfigHash - BL2U */
#define BL2U_HASH_OID "1.3.6.1.4.1.4128.2100.101"
#define AP_FWU_CFG_HASH_OID "1.3.6.1.4.1.4128.2100.101"
/* SCPFirmwareUpdaterConfigHash - SCP_BL2U */
#define SCP_BL2U_HASH_OID "1.3.6.1.4.1.4128.2100.102"
#define SCP_FWU_CFG_HASH_OID "1.3.6.1.4.1.4128.2100.102"
/* FirmwareUpdaterHash - NS_BL2U */
#define NS_BL2U_HASH_OID "1.3.6.1.4.1.4128.2100.103"
#define FWU_HASH_OID "1.3.6.1.4.1.4128.2100.103"
/* TrustedWatchdogRefreshTime */
#define TRUSTED_WATCHDOG_TIME_OID "1.3.6.1.4.1.4128.2100.104"
......@@ -68,7 +68,7 @@
*/
/* TrustedBootFirmwareHash - BL2 */
#define BL2_HASH_OID "1.3.6.1.4.1.4128.2100.201"
#define TRUSTED_BOOT_FW_HASH_OID "1.3.6.1.4.1.4128.2100.201"
/*
......@@ -78,9 +78,9 @@
/* PrimaryDebugCertificatePK */
#define PRIMARY_DEBUG_PK_OID "1.3.6.1.4.1.4128.2100.301"
/* TrustedWorldPK */
#define TZ_WORLD_PK_OID "1.3.6.1.4.1.4128.2100.302"
#define TRUSTED_WORLD_PK_OID "1.3.6.1.4.1.4128.2100.302"
/* NonTrustedWorldPK */
#define NTZ_WORLD_PK_OID "1.3.6.1.4.1.4128.2100.303"
#define NON_TRUSTED_WORLD_PK_OID "1.3.6.1.4.1.4128.2100.303"
/*
......@@ -100,7 +100,7 @@
*/
/* SoCFirmwareContentCertPK */
#define BL31_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.501"
#define SOC_FW_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.501"
/*
......@@ -112,7 +112,7 @@
/* SoCConfigHash */
#define SOC_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.602"
/* SoCAPFirmwareHash - BL31 */
#define BL31_HASH_OID "1.3.6.1.4.1.4128.2100.603"
#define SOC_AP_FW_HASH_OID "1.3.6.1.4.1.4128.2100.603"
/*
......@@ -120,16 +120,16 @@
*/
/* SCPFirmwareContentCertPK */
#define BL30_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.701"
#define SCP_FW_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.701"
/*
* SCP Firmware Content Certificate
*/
/* SCPFirmwareHash - BL30 */
#define BL30_HASH_OID "1.3.6.1.4.1.4128.2100.801"
/* SCPRomPatchHash - BL0_PATCH */
/* SCPFirmwareHash - SCP_BL2 */
#define SCP_FW_HASH_OID "1.3.6.1.4.1.4128.2100.801"
/* SCPRomPatchHash - SCP_BL1_PATCH */
#define SCP_ROM_PATCH_HASH_OID "1.3.6.1.4.1.4128.2100.802"
......@@ -138,7 +138,7 @@
*/
/* TrustedOSFirmwareContentCertPK */
#define BL32_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.901"
#define TRUSTED_OS_FW_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.901"
/*
......@@ -146,7 +146,7 @@
*/
/* TrustedOSFirmwareHash - BL32 */
#define BL32_HASH_OID "1.3.6.1.4.1.4128.2100.1001"
#define TRUSTED_OS_FW_HASH_OID "1.3.6.1.4.1.4128.2100.1001"
/*
......@@ -154,7 +154,7 @@
*/
/* NonTrustedFirmwareContentCertPK */
#define BL33_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.1101"
#define NON_TRUSTED_FW_CONTENT_CERT_PK_OID "1.3.6.1.4.1.4128.2100.1101"
/*
......@@ -162,6 +162,6 @@
*/
/* NonTrustedWorldBootloaderHash - BL33 */
#define BL33_HASH_OID "1.3.6.1.4.1.4128.2100.1201"
#define NON_TRUSTED_WORLD_BOOTLOADER_HASH_OID "1.3.6.1.4.1.4128.2100.1201"
#endif /* __BOARD_ARM_OID_H__ */
include/plat/arm/common/aarch64/arm_macros.S
View file @ 31d5e7f5
......@@ -57,7 +57,7 @@ spacer:
/* ---------------------------------------------
* The below utility macro prints out relevant GIC
* registers whenever an unhandled exception is
* taken in BL3-1 on ARM standard platforms.
* taken in BL31 on ARM standard platforms.
* Expects: GICD base in x16, GICC base in x17
* Clobbers: x0 - x10, sp
* ---------------------------------------------
......@@ -125,7 +125,7 @@ cci_iface_regs:
/* ------------------------------------------------
* The below required platform porting macro prints
* out relevant interconnect registers whenever an
* unhandled exception is taken in BL3-1.
* unhandled exception is taken in BL31.
* Clobbers: x0 - x9, sp
* ------------------------------------------------
*/
......
include/plat/arm/common/arm_def.h
View file @ 31d5e7f5
......@@ -41,7 +41,7 @@
* Definitions common to all ARM standard platforms
*****************************************************************************/
/* Special value used to verify platform parameters from BL2 to BL3-1 */
/* Special value used to verify platform parameters from BL2 to BL31 */
#define ARM_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
#define ARM_CLUSTER_COUNT 2
......@@ -257,7 +257,7 @@
* BL2 specific defines.
******************************************************************************/
/*
* Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
* Put BL2 just below BL31. BL2_BASE is calculated using the current BL2 debug
* size plus a little space for growth.
*/
#if TRUSTED_BOARD_BOOT
......@@ -268,11 +268,11 @@
#define BL2_LIMIT BL31_BASE
/*******************************************************************************
* BL3-1 specific defines.
* BL31 specific defines.
******************************************************************************/
/*
* Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
* current BL3-1 debug size plus a little space for growth.
* Put BL31 at the top of the Trusted SRAM. BL31_BASE is calculated using the
* current BL31 debug size plus a little space for growth.
*/
#define BL31_BASE (ARM_BL_RAM_BASE + \
ARM_BL_RAM_SIZE - \
......@@ -281,7 +281,7 @@
#define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/*******************************************************************************
* BL3-2 specific defines.
* BL32 specific defines.
******************************************************************************/
/*
* On ARM standard platforms, the TSP can execute from Trusted SRAM,
......
include/plat/arm/common/plat_arm.h
View file @ 31d5e7f5
......@@ -87,7 +87,7 @@ void arm_configure_mmu_el3(unsigned long total_base,
#else
/*
* Empty macros for all other BL stages other than BL3-1
* Empty macros for all other BL stages other than BL31
*/
#define ARM_INSTANTIATE_LOCK
#define arm_lock_init()
......@@ -171,7 +171,7 @@ void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
void arm_bl2u_platform_setup(void);
void arm_bl2u_plat_arch_setup(void);
/* BL3-1 utility functions */
/* BL31 utility functions */
void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2);
void arm_bl31_platform_setup(void);
......
include/plat/arm/css/common/aarch64/css_macros.S
View file @ 31d5e7f5
......@@ -36,7 +36,7 @@
/* ---------------------------------------------
* The below required platform porting macro
* prints out relevant GIC registers whenever an
* unhandled exception is taken in BL3-1.
* unhandled exception is taken in BL31.
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
......
include/plat/arm/css/common/css_def.h
View file @ 31d5e7f5
......@@ -82,7 +82,7 @@
* primary, according to the shift and mask definitions below.
*
* Note that the value stored at this address is only valid at boot time, before
* the BL3-0 image is transferred to SCP.
* the SCP_BL2 image is transferred to SCP.
*/
#define SCP_BOOT_CFG_ADDR (ARM_TRUSTED_SRAM_BASE + 0x80)
#define PRIMARY_CPU_SHIFT 8
......@@ -110,11 +110,11 @@
************************************************************************/
/*
* Load address of BL3-0 in CSS platform ports
* BL3-0 is loaded to the same place as BL3-1. Once BL3-0 is transferred to the
* SCP, it is discarded and BL3-1 is loaded over the top.
* Load address of SCP_BL2 in CSS platform ports
* SCP_BL2 is loaded to the same place as BL31. Once SCP_BL2 is transferred to the
* SCP, it is discarded and BL31 is loaded over the top.
*/
#define BL30_BASE BL31_BASE
#define SCP_BL2_BASE BL31_BASE
#define SCP_BL2U_BASE BL31_BASE
......
include/plat/common/common_def.h
View file @ 31d5e7f5
......@@ -55,7 +55,7 @@
* avoid subtle integer overflow errors due to implicit integer type promotion
* when working with 32-bit values.
*
* The TSP linker script includes some of these definitions to define the BL3-2
* The TSP linker script includes some of these definitions to define the BL32
* memory map, but the GNU LD does not support the 'ull' suffix, causing the
* build process to fail. To solve this problem, the auxiliary macro MAKE_ULL(x)
* will add the 'ull' suffix only when the macro __LINKER__ is not defined
......
include/plat/common/platform.h
View file @ 31d5e7f5
......@@ -134,7 +134,7 @@ struct meminfo *bl2_plat_sec_mem_layout(void);
/*
* This function returns a pointer to the shared memory that the platform has
* kept aside to pass trusted firmware related information that BL3-1
* kept aside to pass trusted firmware related information that BL31
* could need
*/
struct bl31_params *bl2_plat_get_bl31_params(void);
......@@ -147,14 +147,14 @@ struct entry_point_info *bl2_plat_get_bl31_ep_info(void);
/*
* This function flushes to main memory all the params that are
* passed to BL3-1
* passed to BL31
*/
void bl2_plat_flush_bl31_params(void);
/*
* The next 2 functions allow the platform to change the entrypoint information
* for the mandatory 3rd level BL images, BL3-1 and BL3-3. This is done after
* BL2 has loaded those images into memory but before BL3-1 is executed.
* for the mandatory 3rd level BL images, BL31 and BL33. This is done after
* BL2 has loaded those images into memory but before BL31 is executed.
*/
void bl2_plat_set_bl31_ep_info(struct image_info *image,
struct entry_point_info *ep);
......@@ -162,30 +162,30 @@ void bl2_plat_set_bl31_ep_info(struct image_info *image,
void bl2_plat_set_bl33_ep_info(struct image_info *image,
struct entry_point_info *ep);
/* Gets the memory layout for BL3-3 */
/* Gets the memory layout for BL33 */
void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info);
/*******************************************************************************
* Conditionally mandatory BL2 functions: must be implemented if BL3-0 image
* Conditionally mandatory BL2 functions: must be implemented if SCP_BL2 image
* is supported
******************************************************************************/
/* Gets the memory layout for BL3-0 */
void bl2_plat_get_bl30_meminfo(struct meminfo *mem_info);
/* Gets the memory layout for SCP_BL2 */
void bl2_plat_get_scp_bl2_meminfo(struct meminfo *mem_info);
/*
* This function is called after loading BL3-0 image and it is used to perform
* This function is called after loading SCP_BL2 image and it is used to perform
* any platform-specific actions required to handle the SCP firmware.
*/
int bl2_plat_handle_bl30(struct image_info *bl30_image_info);
int bl2_plat_handle_scp_bl2(struct image_info *scp_bl2_image_info);
/*******************************************************************************
* Conditionally mandatory BL2 functions: must be implemented if BL3-2 image
* Conditionally mandatory BL2 functions: must be implemented if BL32 image
* is supported
******************************************************************************/
void bl2_plat_set_bl32_ep_info(struct image_info *image,
struct entry_point_info *ep);
/* Gets the memory layout for BL3-2 */
/* Gets the memory layout for BL32 */
void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info);
/*******************************************************************************
......@@ -210,7 +210,7 @@ void bl2u_platform_setup(void);
int bl2u_plat_handle_scp_bl2u(void);
/*******************************************************************************
* Mandatory BL3-1 functions
* Mandatory BL31 functions
******************************************************************************/
void bl31_early_platform_setup(struct bl31_params *from_bl2,
void *plat_params_from_bl2);
......@@ -220,26 +220,26 @@ void bl31_plat_runtime_setup(void);
struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
/*******************************************************************************
* Mandatory PSCI functions (BL3-1)
* Mandatory PSCI functions (BL31)
******************************************************************************/
int plat_setup_psci_ops(uintptr_t sec_entrypoint,
const struct plat_psci_ops **);
const unsigned char *plat_get_power_domain_tree_desc(void);
/*******************************************************************************
* Optional PSCI functions (BL3-1).
* Optional PSCI functions (BL31).
******************************************************************************/
plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
const plat_local_state_t *states,
unsigned int ncpu);
/*******************************************************************************
* Optional BL3-1 functions (may be overridden)
* Optional BL31 functions (may be overridden)
******************************************************************************/
void bl31_plat_enable_mmu(uint32_t flags);
/*******************************************************************************
* Optional BL3-2 functions (may be overridden)
* Optional BL32 functions (may be overridden)
******************************************************************************/
void bl32_plat_enable_mmu(uint32_t flags);
......@@ -261,7 +261,7 @@ int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
unsigned int platform_get_core_pos(unsigned long mpidr);
/*******************************************************************************
* Mandatory PSCI Compatibility functions (BL3-1)
* Mandatory PSCI Compatibility functions (BL31)
******************************************************************************/
int platform_setup_pm(const plat_pm_ops_t **);
......
make_helpers/build_macros.mk
View file @ 31d5e7f5
......@@ -110,8 +110,8 @@ endef
# FIP_ADD_IMG allows the platform to specify an image to be packed in the FIP
# using a build option. It also adds a dependency on the image file, aborting
# the build if the file does not exist.
# $(1) = build option to specify the image filename (BL30, BL33, etc)
# $(2) = command line option for the fip_create tool (bl30, bl33, etc)
# $(1) = build option to specify the image filename (SCP_BL2, BL33, etc)
# $(2) = command line option for the fip_create tool (scp_bl2, bl33, etc)
# Example:
# $(eval $(call FIP_ADD_IMG,BL33,--bl33))
define FIP_ADD_IMG
......
make_helpers/tbbr/tbbr_tools.mk
View file @ 31d5e7f5
......@@ -35,9 +35,9 @@
# Expected environment:
#
# BUILD_PLAT: output directory
# NEED_BL32: indicates whether BL3-2 is needed by the platform
# NEED_BL32: indicates whether BL32 is needed by the platform
# BL2: image filename (optional). Default is IMG_BIN(2) (see macro IMG_BIN)
# BL30: image filename (optional). Default is IMG_BIN(30)
# SCP_BL2: image filename (optional). Default is IMG_BIN(30)
# BL31: image filename (optional). Default is IMG_BIN(31)
# BL32: image filename (optional). Default is IMG_BIN(32)
# BL33: image filename (optional). Default is IMG_BIN(33)
......@@ -48,7 +48,7 @@
# ROT_KEY
# TRUSTED_WORLD_KEY
# NON_TRUSTED_WORLD_KEY
# BL30_KEY
# SCP_BL2_KEY
# BL31_KEY
# BL32_KEY
# BL33_KEY
......@@ -76,61 +76,61 @@ $(if ${TRUSTED_WORLD_KEY},$(eval $(call CERT_ADD_CMD_OPT,${TRUSTED_WORLD_KEY},--
$(if ${NON_TRUSTED_WORLD_KEY},$(eval $(call CERT_ADD_CMD_OPT,${NON_TRUSTED_WORLD_KEY},--non-trusted-world-key)))
# Add the BL2 CoT (image cert + image)
$(if ${BL2},$(eval $(call CERT_ADD_CMD_OPT,${BL2},--bl2,true)),\
$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,2),--bl2,true)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl2.crt,--bl2-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl2.crt,--bl2-cert))
$(if ${BL2},$(eval $(call CERT_ADD_CMD_OPT,${BL2},--tb-fw,true)),\
$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,2),--tb-fw,true)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
# Add the BL30 CoT (key cert + img cert + image)
ifneq (${BL30},)
$(eval $(call CERT_ADD_CMD_OPT,${BL30},--bl30,true))
$(if ${BL30_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL30_KEY},--bl30-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl30.crt,--bl30-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl30_key.crt,--bl30-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl30.crt,--bl30-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl30_key.crt,--bl30-key-cert))
# Add the SCP_BL2 CoT (key cert + img cert + image)
ifneq (${SCP_BL2},)
$(eval $(call CERT_ADD_CMD_OPT,${SCP_BL2},--scp-fw,true))
$(if ${SCP_BL2_KEY},$(eval $(call CERT_ADD_CMD_OPT,${SCP_BL2_KEY},--scp-fw-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/scp_fw_content.crt,--scp-fw-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/scp_fw_key.crt,--scp-fw-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/scp_fw_content.crt,--scp-fw-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/scp_fw_key.crt,--scp-fw-key-cert))
endif
# Add the BL31 CoT (key cert + img cert + image)
$(if ${BL31},$(eval $(call CERT_ADD_CMD_OPT,${BL31},--bl31,true)),\
$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,31),--bl31,true)))
$(if ${BL31_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL31_KEY},--bl31-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl31.crt,--bl31-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl31_key.crt,--bl31-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl31.crt,--bl31-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl31_key.crt,--bl31-key-cert))
$(if ${BL31},$(eval $(call CERT_ADD_CMD_OPT,${BL31},--soc-fw,true)),\
$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,31),--soc-fw,true)))
$(if ${BL31_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL31_KEY},--soc-fw-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/soc_fw_content.crt,--soc-fw-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/soc_fw_key.crt,--soc-fw-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/soc_fw_content.crt,--soc-fw-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/soc_fw_key.crt,--soc-fw-key-cert))
# Add the BL32 CoT (key cert + img cert + image)
ifeq (${NEED_BL32},yes)
$(if ${BL32},$(eval $(call CERT_ADD_CMD_OPT,${BL32},--bl32,true)),\
$(if ${BL32_SOURCES},$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,32),--bl32,true))))
$(if ${BL32_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL32_KEY},--bl32-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl32.crt,--bl32-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl32_key.crt,--bl32-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl32.crt,--bl32-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl32_key.crt,--bl32-key-cert))
$(if ${BL32},$(eval $(call CERT_ADD_CMD_OPT,${BL32},--tos-fw,true)),\
$(if ${BL32_SOURCES},$(eval $(call CERT_ADD_CMD_OPT,$(call IMG_BIN,32),--tos-fw,true))))
$(if ${BL32_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL32_KEY},--tos-fw-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/tos_fw_content.crt,--tos-fw-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/tos_fw_key.crt,--tos-fw-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/tos_fw_content.crt,--tos-fw-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/tos_fw_key.crt,--tos-fw-key-cert))
endif
# Add the BL33 CoT (key cert + img cert + image)
ifneq (${BL33},)
$(eval $(call CERT_ADD_CMD_OPT,${BL33},--bl33,true))
$(if ${BL33_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL33_KEY},--bl33-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl33.crt,--bl33-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/bl33_key.crt,--bl33-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl33.crt,--bl33-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl33_key.crt,--bl33-key-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BL33},--nt-fw,true))
$(if ${BL33_KEY},$(eval $(call CERT_ADD_CMD_OPT,${BL33_KEY},--nt-fw-key)))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/nt_fw_content.crt,--nt-fw-cert))
$(eval $(call CERT_ADD_CMD_OPT,${BUILD_PLAT}/nt_fw_key.crt,--nt-fw-key-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/nt_fw_content.crt,--nt-fw-cert))
$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/nt_fw_key.crt,--nt-fw-key-cert))
endif
# Add the BL2U image
$(if ${BL2U},$(eval $(call FWU_CERT_ADD_CMD_OPT,${BL2U},--bl2u,true)),\
$(eval $(call FWU_CERT_ADD_CMD_OPT,$(call IMG_BIN,2u),--bl2u,true)))
$(if ${BL2U},$(eval $(call FWU_CERT_ADD_CMD_OPT,${BL2U},--ap-fwu-cfg,true)),\
$(eval $(call FWU_CERT_ADD_CMD_OPT,$(call IMG_BIN,2u),--ap-fwu-cfg,true)))
# Add the SCP_BL2U image
ifneq (${SCP_BL2U},)
$(eval $(call FWU_CERT_ADD_CMD_OPT,${SCP_BL2U},--scp_bl2u,true))
$(eval $(call FWU_CERT_ADD_CMD_OPT,${SCP_BL2U},--scp-fwu-cfg,true))
endif
# Add the NS_BL2U image
ifneq (${NS_BL2U},)
$(eval $(call FWU_CERT_ADD_CMD_OPT,${NS_BL2U},--ns_bl2u,true))
$(eval $(call FWU_CERT_ADD_CMD_OPT,${NS_BL2U},--fwu,true))
endif
plat/arm/board/fvp/fvp_io_storage.c
View file @ 31d5e7f5
......@@ -44,14 +44,14 @@
#define BL33_IMAGE_NAME "bl33.bin"
#if TRUSTED_BOARD_BOOT
#define BL2_CERT_NAME "bl2.crt"
#define TRUSTED_BOOT_FW_CERT_NAME "tb_fw.crt"
#define TRUSTED_KEY_CERT_NAME "trusted_key.crt"
#define BL31_KEY_CERT_NAME "bl31_key.crt"
#define BL32_KEY_CERT_NAME "bl32_key.crt"
#define BL33_KEY_CERT_NAME "bl33_key.crt"
#define BL31_CERT_NAME "bl31.crt"
#define BL32_CERT_NAME "bl32.crt"
#define BL33_CERT_NAME "bl33.crt"
#define SOC_FW_KEY_CERT_NAME "soc_fw_key.crt"
#define TOS_FW_KEY_CERT_NAME "tos_fw_key.crt"
#define NT_FW_KEY_CERT_NAME "nt_fw_key.crt"
#define SOC_FW_CONTENT_CERT_NAME "soc_fw_content.crt"
#define TOS_FW_CONTENT_CERT_NAME "tos_fw_content.crt"
#define NT_FW_CONTENT_CERT_NAME "nt_fw_content.crt"
#endif /* TRUSTED_BOARD_BOOT */
/* IO devices */
......@@ -76,36 +76,36 @@ static const io_file_spec_t sh_file_spec[] = {
.mode = FOPEN_MODE_RB
},
#if TRUSTED_BOARD_BOOT
[BL2_CERT_ID] = {
.path = BL2_CERT_NAME,
[TRUSTED_BOOT_FW_CERT_ID] = {
.path = TRUSTED_BOOT_FW_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[TRUSTED_KEY_CERT_ID] = {
.path = TRUSTED_KEY_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL31_KEY_CERT_ID] = {
.path = BL31_KEY_CERT_NAME,
[SOC_FW_KEY_CERT_ID] = {
.path = SOC_FW_KEY_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL32_KEY_CERT_ID] = {
.path = BL32_KEY_CERT_NAME,
[TRUSTED_OS_FW_KEY_CERT_ID] = {
.path = TOS_FW_KEY_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL33_KEY_CERT_ID] = {
.path = BL33_KEY_CERT_NAME,
[NON_TRUSTED_FW_KEY_CERT_ID] = {
.path = NT_FW_KEY_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL31_CERT_ID] = {
.path = BL31_CERT_NAME,
[SOC_FW_CONTENT_CERT_ID] = {
.path = SOC_FW_CONTENT_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL32_CERT_ID] = {
.path = BL32_CERT_NAME,
[TRUSTED_OS_FW_CONTENT_CERT_ID] = {
.path = TOS_FW_CONTENT_CERT_NAME,
.mode = FOPEN_MODE_RB
},
[BL33_CERT_ID] = {
.path = BL33_CERT_NAME,
[NON_TRUSTED_FW_CONTENT_CERT_ID] = {
.path = NT_FW_CONTENT_CERT_NAME,
.mode = FOPEN_MODE_RB
},
#endif /* TRUSTED_BOARD_BOOT */
......
plat/arm/board/fvp/include/plat_macros.S
View file @ 31d5e7f5
......@@ -37,7 +37,7 @@
/* ---------------------------------------------
* The below required platform porting macro
* prints out relevant GIC registers whenever an
* unhandled exception is taken in BL3-1.
* unhandled exception is taken in BL31.
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
......
plat/arm/board/fvp/include/platform_def.h
View file @ 31d5e7f5
......@@ -67,7 +67,7 @@
#define PLAT_ARM_SHARED_RAM_CACHED 1
/*
* Load address of BL3-3 for this platform port
* Load address of BL33 for this platform port
*/
#define PLAT_ARM_NS_IMAGE_OFFSET (ARM_DRAM1_BASE + 0x8000000)
......
plat/arm/common/aarch64/arm_common.c
View file @ 31d5e7f5
......@@ -109,7 +109,7 @@ uint32_t arm_get_spsr_for_bl32_entry(void)
{
/*
* The Secure Payload Dispatcher service is responsible for
* setting the SPSR prior to entry into the BL3-2 image.
* setting the SPSR prior to entry into the BL32 image.
*/
return 0;
}
......
plat/arm/common/arm_bl2_setup.c
View file @ 31d5e7f5
......@@ -64,7 +64,7 @@ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
/*******************************************************************************
* This structure represents the superset of information that is passed to
* BL3-1, e.g. while passing control to it from BL2, bl31_params
* BL31, e.g. while passing control to it from BL2, bl31_params
* and other platform specific params
******************************************************************************/
typedef struct bl2_to_bl31_params_mem {
......@@ -90,7 +90,7 @@ static bl2_to_bl31_params_mem_t bl31_params_mem;
#pragma weak bl2_plat_get_bl31_ep_info
#pragma weak bl2_plat_flush_bl31_params
#pragma weak bl2_plat_set_bl31_ep_info
#pragma weak bl2_plat_get_bl30_meminfo
#pragma weak bl2_plat_get_scp_bl2_meminfo
#pragma weak bl2_plat_get_bl32_meminfo
#pragma weak bl2_plat_set_bl32_ep_info
#pragma weak bl2_plat_get_bl33_meminfo
......@@ -117,7 +117,7 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
/*
* Initialise the memory for all the arguments that needs to
* be passed to BL3-1
* be passed to BL31
*/
memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t));
......@@ -125,12 +125,12 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
bl2_to_bl31_params = &bl31_params_mem.bl31_params;
SET_PARAM_HEAD(bl2_to_bl31_params, PARAM_BL31, VERSION_1, 0);
/* Fill BL3-1 related information */
/* Fill BL31 related information */
bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info, PARAM_IMAGE_BINARY,
VERSION_1, 0);
/* Fill BL3-2 related information if it exists */
/* Fill BL32 related information if it exists */
#if BL32_BASE
bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, PARAM_EP,
......@@ -140,12 +140,12 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
VERSION_1, 0);
#endif
/* Fill BL3-3 related information */
/* Fill BL33 related information */
bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl33_ep_info,
PARAM_EP, VERSION_1, 0);
/* BL3-3 expects to receive the primary CPU MPID (through x0) */
/* BL33 expects to receive the primary CPU MPID (through x0) */
bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
......@@ -235,18 +235,18 @@ void bl2_plat_arch_setup(void)
}
/*******************************************************************************
* Populate the extents of memory available for loading BL3-0 (if used),
* Populate the extents of memory available for loading SCP_BL2 (if used),
* i.e. anywhere in trusted RAM as long as it doesn't overwrite BL2.
******************************************************************************/
void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo)
void bl2_plat_get_scp_bl2_meminfo(meminfo_t *scp_bl2_meminfo)
{
*bl30_meminfo = bl2_tzram_layout;
*scp_bl2_meminfo = bl2_tzram_layout;
}
/*******************************************************************************
* Before calling this function BL3-1 is loaded in memory and its entrypoint
* Before calling this function BL31 is loaded in memory and its entrypoint
* is set by load_image. This is a placeholder for the platform to change
* the entrypoint of BL3-1 and set SPSR and security state.
* the entrypoint of BL31 and set SPSR and security state.
* On ARM standard platforms we only set the security state of the entrypoint
******************************************************************************/
void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info,
......@@ -259,9 +259,9 @@ void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info,
/*******************************************************************************
* Before calling this function BL3-2 is loaded in memory and its entrypoint
* Before calling this function BL32 is loaded in memory and its entrypoint
* is set by load_image. This is a placeholder for the platform to change
* the entrypoint of BL3-2 and set SPSR and security state.
* the entrypoint of BL32 and set SPSR and security state.
* On ARM standard platforms we only set the security state of the entrypoint
******************************************************************************/
void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info,
......@@ -272,9 +272,9 @@ void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info,
}
/*******************************************************************************
* Before calling this function BL3-3 is loaded in memory and its entrypoint
* Before calling this function BL33 is loaded in memory and its entrypoint
* is set by load_image. This is a placeholder for the platform to change
* the entrypoint of BL3-3 and set SPSR and security state.
* the entrypoint of BL33 and set SPSR and security state.
* On ARM standard platforms we only set the security state of the entrypoint
******************************************************************************/
void bl2_plat_set_bl33_ep_info(image_info_t *image,
......
plat/arm/common/arm_bl31_setup.c
View file @ 31d5e7f5
......@@ -43,7 +43,7 @@
/*
* The next 3 constants identify the extents of the code, RO data region and the
* limit of the BL3-1 image. These addresses are used by the MMU setup code and
* limit of the BL31 image. These addresses are used by the MMU setup code and
* therefore they must be page-aligned. It is the responsibility of the linker
* script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
* refer to page-aligned addresses.
......@@ -66,7 +66,7 @@
/*
* Placeholder variables for copying the arguments that have been passed to
* BL3-1 from BL2.
* BL31 from BL2.
*/
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
......@@ -82,8 +82,8 @@ static entry_point_info_t bl33_image_ep_info;
/*******************************************************************************
* Return a pointer to the 'entry_point_info' structure of the next image for the
* security state specified. BL3-3 corresponds to the non-secure image type
* while BL3-2 corresponds to the secure image type. A NULL pointer is returned
* security state specified. BL33 corresponds to the non-secure image type
* while BL32 corresponds to the secure image type. A NULL pointer is returned
* if the image does not exist.
******************************************************************************/
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
......@@ -104,7 +104,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
}
/*******************************************************************************
* Perform any BL3-1 early platform setup common to ARM standard platforms.
* Perform any BL31 early platform setup common to ARM standard platforms.
* Here is an opportunity to copy parameters passed by the calling EL (S-EL1
* in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be
* done before the MMU is initialized so that the memory layout can be used
......@@ -119,12 +119,12 @@ void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
ARM_CONSOLE_BAUDRATE);
#if RESET_TO_BL31
/* There are no parameters from BL2 if BL3-1 is a reset vector */
/* There are no parameters from BL2 if BL31 is a reset vector */
assert(from_bl2 == NULL);
assert(plat_params_from_bl2 == NULL);
#ifdef BL32_BASE
/* Populate entry point information for BL3-2 */
/* Populate entry point information for BL32 */
SET_PARAM_HEAD(&bl32_image_ep_info,
PARAM_EP,
VERSION_1,
......@@ -134,13 +134,13 @@ void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
#endif /* BL32_BASE */
/* Populate entry point information for BL3-3 */
/* Populate entry point information for BL33 */
SET_PARAM_HEAD(&bl33_image_ep_info,
PARAM_EP,
VERSION_1,
0);
/*
* Tell BL3-1 where the non-trusted software image
* Tell BL31 where the non-trusted software image
* is located and the entry state information
*/
bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
......@@ -156,14 +156,14 @@ void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
assert(from_bl2->h.version >= VERSION_1);
/*
* In debug builds, we pass a special value in 'plat_params_from_bl2'
* to verify platform parameters from BL2 to BL3-1.
* to verify platform parameters from BL2 to BL31.
* In release builds, it's not used.
*/
assert(((unsigned long long)plat_params_from_bl2) ==
ARM_BL31_PLAT_PARAM_VAL);
/*
* Copy BL3-2 (if populated by BL2) and BL3-3 entry point information.
* Copy BL32 (if populated by BL2) and BL33 entry point information.
* They are stored in Secure RAM, in BL2's address space.
*/
if (from_bl2->bl32_ep_info)
......@@ -195,7 +195,7 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
}
/*******************************************************************************
* Perform any BL3-1 platform setup common to ARM standard platforms
* Perform any BL31 platform setup common to ARM standard platforms
******************************************************************************/
void arm_bl31_platform_setup(void)
{
......@@ -224,7 +224,7 @@ void arm_bl31_platform_setup(void)
}
/*******************************************************************************
* Perform any BL3-1 platform runtime setup prior to BL3-1 exit common to ARM
* Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
* standard platforms
******************************************************************************/
void arm_bl31_plat_runtime_setup(void)
......
plat/arm/common/arm_io_storage.c
View file @ 31d5e7f5
......@@ -53,8 +53,8 @@ static const io_uuid_spec_t bl2_uuid_spec = {
.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
};
static const io_uuid_spec_t bl30_uuid_spec = {
.uuid = UUID_SCP_FIRMWARE_BL30,
static const io_uuid_spec_t scp_bl2_uuid_spec = {
.uuid = UUID_SCP_FIRMWARE_SCP_BL2,
};
static const io_uuid_spec_t bl31_uuid_spec = {
......@@ -70,44 +70,44 @@ static const io_uuid_spec_t bl33_uuid_spec = {
};
#if TRUSTED_BOARD_BOOT
static const io_uuid_spec_t bl2_cert_uuid_spec = {
.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2_CERT,
static const io_uuid_spec_t tb_fw_cert_uuid_spec = {
.uuid = UUID_TRUSTED_BOOT_FW_CERT,
};
static const io_uuid_spec_t trusted_key_cert_uuid_spec = {
.uuid = UUID_TRUSTED_KEY_CERT,
};
static const io_uuid_spec_t bl30_key_cert_uuid_spec = {
.uuid = UUID_SCP_FIRMWARE_BL30_KEY_CERT,
static const io_uuid_spec_t scp_fw_key_cert_uuid_spec = {
.uuid = UUID_SCP_FW_KEY_CERT,
};
static const io_uuid_spec_t bl31_key_cert_uuid_spec = {
.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31_KEY_CERT,
static const io_uuid_spec_t soc_fw_key_cert_uuid_spec = {
.uuid = UUID_SOC_FW_KEY_CERT,
};
static const io_uuid_spec_t bl32_key_cert_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32_KEY_CERT,
static const io_uuid_spec_t tos_fw_key_cert_uuid_spec = {
.uuid = UUID_TRUSTED_OS_FW_KEY_CERT,
};
static const io_uuid_spec_t bl33_key_cert_uuid_spec = {
.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33_KEY_CERT,
static const io_uuid_spec_t nt_fw_key_cert_uuid_spec = {
.uuid = UUID_NON_TRUSTED_FW_KEY_CERT,
};
static const io_uuid_spec_t bl30_cert_uuid_spec = {
.uuid = UUID_SCP_FIRMWARE_BL30_CERT,
static const io_uuid_spec_t scp_fw_cert_uuid_spec = {
.uuid = UUID_SCP_FW_CONTENT_CERT,
};
static const io_uuid_spec_t bl31_cert_uuid_spec = {
.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31_CERT,
static const io_uuid_spec_t soc_fw_cert_uuid_spec = {
.uuid = UUID_SOC_FW_CONTENT_CERT,
};
static const io_uuid_spec_t bl32_cert_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32_CERT,
static const io_uuid_spec_t tos_fw_cert_uuid_spec = {
.uuid = UUID_TRUSTED_OS_FW_CONTENT_CERT,
};
static const io_uuid_spec_t bl33_cert_uuid_spec = {
.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33_CERT,
static const io_uuid_spec_t nt_fw_cert_uuid_spec = {
.uuid = UUID_NON_TRUSTED_FW_CONTENT_CERT,
};
#endif /* TRUSTED_BOARD_BOOT */
......@@ -133,9 +133,9 @@ static const struct plat_io_policy policies[] = {
(uintptr_t)&bl2_uuid_spec,
open_fip
},
[BL30_IMAGE_ID] = {
[SCP_BL2_IMAGE_ID] = {
&fip_dev_handle,
(uintptr_t)&bl30_uuid_spec,
(uintptr_t)&scp_bl2_uuid_spec,
open_fip
},
[BL31_IMAGE_ID] = {
......@@ -154,9 +154,9 @@ static const struct plat_io_policy policies[] = {
open_fip
},
#if TRUSTED_BOARD_BOOT
[BL2_CERT_ID] = {
[TRUSTED_BOOT_FW_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl2_cert_uuid_spec,
(uintptr_t)&tb_fw_cert_uuid_spec,
open_fip
},
[TRUSTED_KEY_CERT_ID] = {
......@@ -164,44 +164,44 @@ static const struct plat_io_policy policies[] = {
(uintptr_t)&trusted_key_cert_uuid_spec,
open_fip
},
[BL30_KEY_CERT_ID] = {
[SCP_FW_KEY_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl30_key_cert_uuid_spec,
(uintptr_t)&scp_fw_key_cert_uuid_spec,
open_fip
},
[BL31_KEY_CERT_ID] = {
[SOC_FW_KEY_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl31_key_cert_uuid_spec,
(uintptr_t)&soc_fw_key_cert_uuid_spec,
open_fip
},
[BL32_KEY_CERT_ID] = {
[TRUSTED_OS_FW_KEY_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl32_key_cert_uuid_spec,
(uintptr_t)&tos_fw_key_cert_uuid_spec,
open_fip
},
[BL33_KEY_CERT_ID] = {
[NON_TRUSTED_FW_KEY_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl33_key_cert_uuid_spec,
(uintptr_t)&nt_fw_key_cert_uuid_spec,
open_fip
},
[BL30_CERT_ID] = {
[SCP_FW_CONTENT_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl30_cert_uuid_spec,
(uintptr_t)&scp_fw_cert_uuid_spec,
open_fip
},
[BL31_CERT_ID] = {
[SOC_FW_CONTENT_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl31_cert_uuid_spec,
(uintptr_t)&soc_fw_cert_uuid_spec,
open_fip
},
[BL32_CERT_ID] = {
[TRUSTED_OS_FW_CONTENT_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl32_cert_uuid_spec,
(uintptr_t)&tos_fw_cert_uuid_spec,
open_fip
},
[BL33_CERT_ID] = {
[NON_TRUSTED_FW_CONTENT_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&bl33_cert_uuid_spec,
(uintptr_t)&nt_fw_cert_uuid_spec,
open_fip
},
#endif /* TRUSTED_BOARD_BOOT */
......
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