rcar_gen3: drivers: power controller

Signed-off-by: ldts <jramirez@baylibre.com>

drivers/renesas/rcar/pwrc/call_sram.S

+/*
+ * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include "rcar_def.h"
+
+.global rcar_pwrc_switch_stack
+.global rcar_pwrc_save_generic_timer
+.global rcar_pwrc_restore_generic_timer
+
+#define OFFSET_SP_X9_X10	(0x00)
+#define OFFSET_CNTFID0		(0x10)
+#define OFFSET_CNTPCT_EL0	(0x18)
+#define OFFSET_TIMER_COUNT	(0x20)
+
+/*
+ * x0 : jump address,
+ * x1 : stack address,
+ * x2 : arg,
+ * x3 : stack address (temporary)
+ */
+func rcar_pwrc_switch_stack
+
+	/* lr to stack */
+	stp	x29, x30, [sp,#-16]
+
+	/* change stack pointer */
+	mov	x3, sp
+	mov	sp, x1
+
+	/* save stack pointer */
+	sub	sp, sp, #16
+	stp	x0, x3, [sp]
+
+	/* data synchronization barrier */
+	dsb	sy
+
+	/* jump to code */
+	mov	x1, x0
+	mov	x0, x2
+	blr	x1
+
+	/* load stack pointer */
+	ldp 	x0, x2, [sp,#0]
+
+	/* change stack pointer */
+	mov	sp, x2
+
+	/* return */
+	ldp	x29, x30, [sp,#-16]
+	ret
+endfunc rcar_pwrc_switch_stack
+
+/* x0 : stack pointer base address */
+func rcar_pwrc_save_generic_timer
+
+	stp	x9, x10, [x0, #OFFSET_SP_X9_X10]
+
+	/* save CNTFID0 and cntpct_el0 */
+	mov_imm	x10, (RCAR_CNTC_BASE + CNTFID_OFF)
+	ldr	x9, [x10]
+	mrs	x10, cntpct_el0
+	stp	x9, x10, [x0, #OFFSET_CNTFID0]
+
+	ldp	x9, x10, [x0, #OFFSET_SP_X9_X10]
+
+	ret
+endfunc rcar_pwrc_save_generic_timer
+
+/* x0 : Stack pointer base address */
+func rcar_pwrc_restore_generic_timer
+
+	stp	x9, x10, [x0, #OFFSET_SP_X9_X10]
+
+	/* restore CNTFID0 and cntpct_el0 */
+	ldr	x10, [x0, #OFFSET_CNTFID0]
+	mov_imm	x9, (RCAR_CNTC_BASE + CNTFID_OFF)
+	str	x10, [x9]
+	ldp	x9, x10, [x0, #OFFSET_CNTPCT_EL0]
+	add	x9, x9, x10
+	str	x9, [x0, #OFFSET_TIMER_COUNT]
+
+	ldp	x9, x10, [x0, #OFFSET_SP_X9_X10]
+
+	ret
+endfunc rcar_pwrc_restore_generic_timer

drivers/renesas/rcar/pwrc/pwrc.h

+/*
+ * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef RCAR_PWRC_H__
+#define RCAR_PWRC_H__
+
+#define PPOFFR_OFF		0x0
+#define PPONR_OFF		0x4
+#define PCOFFR_OFF		0x8
+#define PWKUPR_OFF		0xc
+#define PSYSR_OFF		0x10
+
+#define PWKUPR_WEN		(1ull << 31)
+
+#define PSYSR_AFF_L2		(1 << 31)
+#define PSYSR_AFF_L1		(1 << 30)
+#define PSYSR_AFF_L0		(1 << 29)
+#define PSYSR_WEN		(1 << 28)
+#define PSYSR_PC		(1 << 27)
+#define PSYSR_PP		(1 << 26)
+
+#define PSYSR_WK_SHIFT		(24)
+#define PSYSR_WK_MASK		(0x3)
+#define PSYSR_WK(x)		(((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK)
+
+#define WKUP_COLD		0x0
+#define WKUP_RESET		0x1
+#define WKUP_PPONR		0x2
+#define WKUP_GICREQ		0x3
+
+#define	RCAR_INVALID		(0xffffffffU)
+#define PSYSR_INVALID		0xffffffff
+
+#define	RCAR_CLUSTER_A53A57	(0U)
+#define	RCAR_CLUSTER_CA53	(1U)
+#define	RCAR_CLUSTER_CA57	(2U)
+
+#ifndef __ASSEMBLY__
+void rcar_pwrc_disable_interrupt_wakeup(uint64_t mpidr);
+void rcar_pwrc_enable_interrupt_wakeup(uint64_t mpidr);
+void rcar_pwrc_clusteroff(uint64_t mpidr);
+void rcar_pwrc_cpuoff(uint64_t mpidr);
+void rcar_pwrc_cpuon(uint64_t mpidr);
+void rcar_pwrc_setup(void);
+
+uint32_t rcar_pwrc_get_cpu_wkr(uint64_t mpidr);
+uint32_t rcar_pwrc_status(uint64_t mpidr);
+uint32_t rcar_pwrc_get_cluster(void);
+uint32_t rcar_pwrc_get_mpidr_cluster(uint64_t mpidr);
+uint32_t rcar_pwrc_get_cpu_num(uint32_t cluster_type);
+void plat_secondary_reset(void);
+
+void rcar_pwrc_code_copy_to_system_ram(void);
+
+#if !PMIC_ROHM_BD9571
+void rcar_pwrc_system_reset(void);
+#endif
+
+#if RCAR_SYSTEM_SUSPEND
+void rcar_pwrc_go_suspend_to_ram(void);
+void rcar_pwrc_set_suspend_to_ram(void);
+void rcar_pwrc_init_suspend_to_ram(void);
+void rcar_pwrc_suspend_to_ram(void);
+#endif
+
+extern void rcar_pwrc_save_generic_timer(uint64_t *rcar_stack_generic_timer);
+extern uint32_t rcar_pwrc_switch_stack(uintptr_t jump, uintptr_t stack,
+				       void *arg);
+
+extern uint64_t rcar_stack_generic_timer[5];
+
+#endif
+
+#endif