fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition

emmc_registers.h contains redefinition of
CPG_CPGWPR from bl2_cpg_register.h
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ie13590100df08f32193653e50191e66ed42d2b28

drivers/renesas/common/emmc/emmc_init.c

 /*
- * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -14,6 +14,7 @@
 #include "emmc_registers.h"
 #include "emmc_def.h"
 #include "rcar_private.h"
+#include "cpg_registers.h"
 
 st_mmc_base mmc_drv_obj;
 

drivers/renesas/common/emmc/emmc_registers.h

 /*
- * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -60,8 +60,6 @@
 #define CPG_SD2CKCR	(CPG_BASE + 0x0268U)
 /* SDHI3 clock frequency control register */
 #define CPG_SD3CKCR	(CPG_BASE + 0x026CU)
-/* CPG Write Protect Register */
-#define CPG_CPGWPR	(CPG_BASE + 0x0900U)
 
 #if USE_MMC_CH == MMC_CH0
 #define CPG_SDxCKCR		(CPG_SD2CKCR)	/* SDHI2/MMC0 */