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Commit 381b901f authored by Carlo Caione's avatar Carlo Caione
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amlogic: Fix prefixes in the SIP/SVC code 



All the SIP/SVC related code is currently the same between GXL and GXBB.
Rename function names and register names to avoid hardcoding the GXBB
prefix.
Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
Change-Id: I7e58ab68489df8d4762663fc01fb64e6899cc8bf
parent 73f6d057
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plat/amlogic/common/aml_scpi.c
View file @ 381b901f
...@@ -89,9 +89,9 @@ uint32_t scpi_sys_power_state(uint64_t system_state) ...@@ -89,9 +89,9 @@ uint32_t scpi_sys_power_state(uint64_t system_state)
void scpi_jtag_set_state(uint32_t state, uint8_t select) void scpi_jtag_set_state(uint32_t state, uint8_t select)
{ {
assert(state <= GXBB_JTAG_STATE_OFF); assert(state <= AML_JTAG_STATE_OFF);
if (select > GXBB_JTAG_A53_EE) { if (select > AML_JTAG_A53_EE) {
WARN("BL31: Invalid JTAG select (0x%x).\n", select); WARN("BL31: Invalid JTAG select (0x%x).\n", select);
return; return;
} }
......
plat/amlogic/common/aml_sip_svc.c
View file @ 381b901f
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
/******************************************************************************* /*******************************************************************************
* This function is responsible for handling all SiP calls * This function is responsible for handling all SiP calls
******************************************************************************/ ******************************************************************************/
static uintptr_t gxbb_sip_handler(uint32_t smc_fid, static uintptr_t aml_sip_handler(uint32_t smc_fid,
u_register_t x1, u_register_t x2, u_register_t x1, u_register_t x2,
u_register_t x3, u_register_t x4, u_register_t x3, u_register_t x4,
void *cookie, void *handle, void *cookie, void *handle,
...@@ -23,28 +23,28 @@ static uintptr_t gxbb_sip_handler(uint32_t smc_fid, ...@@ -23,28 +23,28 @@ static uintptr_t gxbb_sip_handler(uint32_t smc_fid,
{ {
switch (smc_fid) { switch (smc_fid) {
case GXBB_SM_GET_SHARE_MEM_INPUT_BASE: case AML_SM_GET_SHARE_MEM_INPUT_BASE:
SMC_RET1(handle, GXBB_SHARE_MEM_INPUT_BASE); SMC_RET1(handle, AML_SHARE_MEM_INPUT_BASE);
case GXBB_SM_GET_SHARE_MEM_OUTPUT_BASE: case AML_SM_GET_SHARE_MEM_OUTPUT_BASE:
SMC_RET1(handle, GXBB_SHARE_MEM_OUTPUT_BASE); SMC_RET1(handle, AML_SHARE_MEM_OUTPUT_BASE);
case GXBB_SM_EFUSE_READ: case AML_SM_EFUSE_READ:
{ {
void *dst = (void *)GXBB_SHARE_MEM_OUTPUT_BASE; void *dst = (void *)AML_SHARE_MEM_OUTPUT_BASE;
uint64_t ret = aml_efuse_read(dst, (uint32_t)x1, x2); uint64_t ret = aml_efuse_read(dst, (uint32_t)x1, x2);
SMC_RET1(handle, ret); SMC_RET1(handle, ret);
} }
case GXBB_SM_EFUSE_USER_MAX: case AML_SM_EFUSE_USER_MAX:
SMC_RET1(handle, aml_efuse_user_max()); SMC_RET1(handle, aml_efuse_user_max());
case GXBB_SM_JTAG_ON: case AML_SM_JTAG_ON:
scpi_jtag_set_state(GXBB_JTAG_STATE_ON, x1); scpi_jtag_set_state(AML_JTAG_STATE_ON, x1);
SMC_RET1(handle, 0); SMC_RET1(handle, 0);
case GXBB_SM_JTAG_OFF: case AML_SM_JTAG_OFF:
scpi_jtag_set_state(GXBB_JTAG_STATE_OFF, x1); scpi_jtag_set_state(AML_JTAG_STATE_OFF, x1);
SMC_RET1(handle, 0); SMC_RET1(handle, 0);
default: default:
...@@ -56,11 +56,11 @@ static uintptr_t gxbb_sip_handler(uint32_t smc_fid, ...@@ -56,11 +56,11 @@ static uintptr_t gxbb_sip_handler(uint32_t smc_fid,
} }
DECLARE_RT_SVC( DECLARE_RT_SVC(
gxbb_sip_handler, aml_sip_handler,
OEN_SIP_START, OEN_SIP_START,
OEN_SIP_END, OEN_SIP_END,
SMC_TYPE_FAST, SMC_TYPE_FAST,
NULL, NULL,
gxbb_sip_handler aml_sip_handler
); );
plat/amlogic/gxbb/gxbb_def.h
View file @ 381b901f
...@@ -28,8 +28,8 @@ ...@@ -28,8 +28,8 @@
#define BL31_LIMIT (BL31_BASE + BL31_SIZE) #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/* Shared memory used for SMC services */ /* Shared memory used for SMC services */
#define GXBB_SHARE_MEM_INPUT_BASE UL(0x100FE000) #define AML_SHARE_MEM_INPUT_BASE UL(0x100FE000)
#define GXBB_SHARE_MEM_OUTPUT_BASE UL(0x100FF000) #define AML_SHARE_MEM_OUTPUT_BASE UL(0x100FF000)
#define GXBB_SEC_DEVICE0_BASE UL(0xC0000000) #define GXBB_SEC_DEVICE0_BASE UL(0xC0000000)
#define GXBB_SEC_DEVICE0_SIZE UL(0x09000000) #define GXBB_SEC_DEVICE0_SIZE UL(0x09000000)
...@@ -98,21 +98,21 @@ ...@@ -98,21 +98,21 @@
/******************************************************************************* /*******************************************************************************
* System Monitor Call IDs and arguments * System Monitor Call IDs and arguments
******************************************************************************/ ******************************************************************************/
#define GXBB_SM_GET_SHARE_MEM_INPUT_BASE U(0x82000020) #define AML_SM_GET_SHARE_MEM_INPUT_BASE U(0x82000020)
#define GXBB_SM_GET_SHARE_MEM_OUTPUT_BASE U(0x82000021) #define AML_SM_GET_SHARE_MEM_OUTPUT_BASE U(0x82000021)
#define GXBB_SM_EFUSE_READ U(0x82000030) #define AML_SM_EFUSE_READ U(0x82000030)
#define GXBB_SM_EFUSE_USER_MAX U(0x82000033) #define AML_SM_EFUSE_USER_MAX U(0x82000033)
#define GXBB_SM_JTAG_ON U(0x82000040) #define AML_SM_JTAG_ON U(0x82000040)
#define GXBB_SM_JTAG_OFF U(0x82000041) #define AML_SM_JTAG_OFF U(0x82000041)
#define GXBB_JTAG_STATE_ON U(0) #define AML_JTAG_STATE_ON U(0)
#define GXBB_JTAG_STATE_OFF U(1) #define AML_JTAG_STATE_OFF U(1)
#define GXBB_JTAG_M3_AO U(0) #define AML_JTAG_M3_AO U(0)
#define GXBB_JTAG_M3_EE U(1) #define AML_JTAG_M3_EE U(1)
#define GXBB_JTAG_A53_AO U(2) #define AML_JTAG_A53_AO U(2)
#define GXBB_JTAG_A53_EE U(3) #define AML_JTAG_A53_EE U(3)
#endif /* GXBB_DEF_H */ #endif /* GXBB_DEF_H */
plat/amlogic/gxl/gxl_def.h
View file @ 381b901f
...@@ -28,8 +28,8 @@ ...@@ -28,8 +28,8 @@
#define BL31_LIMIT (BL31_BASE + BL31_SIZE) #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/* Shared memory used for SMC services */ /* Shared memory used for SMC services */
#define GXBB_SHARE_MEM_INPUT_BASE UL(0x050FE000) #define AML_SHARE_MEM_INPUT_BASE UL(0x050FE000)
#define GXBB_SHARE_MEM_OUTPUT_BASE UL(0x050FF000) #define AML_SHARE_MEM_OUTPUT_BASE UL(0x050FF000)
#define GXBB_SEC_DEVICE0_BASE UL(0xC0000000) #define GXBB_SEC_DEVICE0_BASE UL(0xC0000000)
#define GXBB_SEC_DEVICE0_SIZE UL(0x09000000) #define GXBB_SEC_DEVICE0_SIZE UL(0x09000000)
...@@ -108,21 +108,21 @@ ...@@ -108,21 +108,21 @@
/******************************************************************************* /*******************************************************************************
* System Monitor Call IDs and arguments * System Monitor Call IDs and arguments
******************************************************************************/ ******************************************************************************/
#define GXBB_SM_GET_SHARE_MEM_INPUT_BASE U(0x82000020) #define AML_SM_GET_SHARE_MEM_INPUT_BASE U(0x82000020)
#define GXBB_SM_GET_SHARE_MEM_OUTPUT_BASE U(0x82000021) #define AML_SM_GET_SHARE_MEM_OUTPUT_BASE U(0x82000021)
#define GXBB_SM_EFUSE_READ U(0x82000030) #define AML_SM_EFUSE_READ U(0x82000030)
#define GXBB_SM_EFUSE_USER_MAX U(0x82000033) #define AML_SM_EFUSE_USER_MAX U(0x82000033)
#define GXBB_SM_JTAG_ON U(0x82000040) #define AML_SM_JTAG_ON U(0x82000040)
#define GXBB_SM_JTAG_OFF U(0x82000041) #define AML_SM_JTAG_OFF U(0x82000041)
#define GXBB_JTAG_STATE_ON U(0) #define AML_JTAG_STATE_ON U(0)
#define GXBB_JTAG_STATE_OFF U(1) #define AML_JTAG_STATE_OFF U(1)
#define GXBB_JTAG_M3_AO U(0) #define AML_JTAG_M3_AO U(0)
#define GXBB_JTAG_M3_EE U(1) #define AML_JTAG_M3_EE U(1)
#define GXBB_JTAG_A53_AO U(2) #define AML_JTAG_A53_AO U(2)
#define GXBB_JTAG_A53_EE U(3) #define AML_JTAG_A53_EE U(3)
#endif /* GXBB_DEF_H */ #endif /* GXBB_DEF_H */
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