Juno: Read primary CPU MPID from SCC GPR_1

This patch removes the PRIMARY_CPU definition hardcoded in the
Juno port. Instead, the primary CPU is obtained at runtime by
reading the SCC General Purpose Register 1 (GPR_1), whose value
is copied by the SCP into shared memory during the boot process.

Change-Id: I3981daa92eb7142250712274cf7f655b219837f5

plat/juno/aarch64/bl1_plat_helpers.S

@@ -32,10 +32,27 @@
 #include <asm_macros.S>
 #include "../juno_def.h"
 
+	.globl	platform_is_primary_cpu
 	.globl	platform_get_entrypoint
 	.globl	platform_cold_boot_init
 	.globl	plat_secondary_cold_boot_setup
 
+	/* -----------------------------------------------------
+	 * unsigned int platform_is_primary_cpu (unsigned int mpid);
+	 *
+	 * Given the mpidr say whether this cpu is the primary
+	 * cpu (applicable ony after a cold boot)
+	 * -----------------------------------------------------
+	 */
+func platform_is_primary_cpu
+	mov	x9, x30
+	bl	platform_get_core_pos
+	ldr	x1, =SCP_BOOT_CFG_ADDR
+	ldr	x1, [x1]
+	ubfx	x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_MASK
+	cmp	x0, x1
+	cset	x0, eq
+	ret	x9
 
 	/* -----------------------------------------------------
 	 * void plat_secondary_cold_boot_setup (void);

plat/juno/aarch64/plat_helpers.S

@@ -41,7 +41,6 @@
 	.globl	plat_report_exception
 	.globl	plat_reset_handler
 	.globl	platform_get_core_pos
-	.globl	platform_is_primary_cpu
 	.globl	platform_mem_init
 
 	/* Define a crash console for the plaform */
@@ -103,21 +102,6 @@ func platform_get_core_pos
 	ret
 
 
-	/* -----------------------------------------------------
-	 * unsigned int platform_is_primary_cpu(unsigned long mpid);
-	 *
-	 * Given the mpidr say whether this cpu is the primary
-	 * cpu (applicable only after a cold boot)
-	 * -----------------------------------------------------
-	 */
-func platform_is_primary_cpu
-	/* Juno todo: allow configuration of primary CPU using SCC */
-	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
-	cmp	x0, #JUNO_PRIMARY_CPU
-	cset	x0, eq
-	ret
-
-
 	/* -----------------------------------------------------
 	 * void platform_mem_init(void);
 	 *

plat/juno/bl2_plat_setup.c

@@ -128,7 +128,7 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
 		PARAM_EP, VERSION_1, 0);
 
 	/* BL3-3 expects to receive the primary CPU MPID (through x0) */
-	bl2_to_bl31_params->bl33_ep_info->args.arg0 = JUNO_PRIMARY_CPU;
+	bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
 
 	bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY,

plat/juno/juno_def.h

@@ -34,8 +34,6 @@
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define JUNO_BL31_PLAT_PARAM_VAL	0x0f1e2d3c4b5a6978ULL
 
-#define JUNO_PRIMARY_CPU		0x100
-
 /*******************************************************************************
  * Juno memory map related constants
  ******************************************************************************/
@@ -194,4 +192,11 @@
 #define CCI400_SL_IFACE3_CLUSTER_IX	1
 #define CCI400_SL_IFACE4_CLUSTER_IX	0
 
+/*******************************************************************************
+ * SCP <=> AP boot configuration
+ ******************************************************************************/
+#define SCP_BOOT_CFG_ADDR	0x04000080
+#define PRIMARY_CPU_SHIFT	8
+#define PRIMARY_CPU_MASK	0xf
+
 #endif /* __JUNO_DEF_H__ */