spmc: manifest changes to support two sample cactus secure partitions

When using the SPM Dispatcher, the SPMC sits as a BL32 component
(BL32_IMAGE_ID). The SPMC manifest is passed as the TOS fw config
component (TOS_FW_CONFIG_ID). It defines platform specific attributes
(memory range and physical CPU layout) as well as the attributes for
each secure partition (mostly load address). This manifest is passed
to the SPMC on boot up. An SP package contains the SP dtb in the SPCI
defined partition manifest format. As the SPMC manifest was enriched
it needs an increase of tos_fw-config max-size in fvp_fw_config dts.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ia1dce00c6c4cbaa118fa56617980d32e2956a94e

plat/arm/board/fvp/fdts/fvp_fw_config.dts

@@ -39,7 +39,7 @@
 
 		tos_fw-config {
 			load-address = <0x0 0x04001200>;
-			max-size = <0x200>;
+			max-size = <0x1000>;
 			id = <TOS_FW_CONFIG_ID>;
 		};
 

plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts

@@ -6,7 +6,7 @@
 /dts-v1/;
 
 / {
-	compatible = "spci-core-manifest-1.0";
+	compatible = "arm,spci-core-manifest-1.0";
 
 	attribute {
 		spmc_id = <0x8000>;
@@ -16,4 +16,52 @@
 		load_address = <0x0 0x6000000>;
 		entrypoint = <0x0 0x6000000>;
 	};
+
+	chosen {
+		linux,initrd-start = <0>;
+		linux,initrd-end = <0>;
+	};
+
+	hypervisor {
+		compatible = "hafnium,hafnium";
+		vm1 {
+			is_spci_partition;
+			debug_name = "cactus-primary";
+			load-addr = <0x7000000>;
+		};
+		vm2 {
+			is_spci_partition;
+			debug_name = "cactus-secondary";
+			load-addr = <0x7100000>;
+			vcpu_count = <2>;
+			mem_size = <1048576>;
+		};
+	};
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <0x2>;
+				};
+			};
+		};
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			next-level-cache = <0xc>;
+			phandle = <0x2>;
+		};
+	};
+
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x6000000 0x2000000>; /* Trusted DRAM */
+	};
 };