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Commit 408c3768 authored by danh-arm's avatar danh-arm
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Merge pull request #48 from danh-arm/dh/major-refactoring 

dh/major refactoring
parents b495bdef 97043ac9
Hide whitespace changes
Inline Side-by-side
include/context.h → include/bl31/context.h
View file @ 408c3768
......@@ -31,9 +31,6 @@
#ifndef __CONTEXT_H__
#define __CONTEXT_H__
#include <bl_common.h>
#include <arch.h>
/*******************************************************************************
* Constants that allow assembler code to access members of and the 'gp_regs'
* structure at their correct offsets.
......@@ -171,15 +168,18 @@
#ifndef __ASSEMBLY__
#include <cassert.h>
#include <stdint.h>
/*
* Common constants to help define the 'cpu_context' structure and its
* members below.
*/
#define DWORD_SHIFT 3
#define DEFINE_REG_STRUCT(name, num_regs) \
typedef struct { \
typedef struct name { \
uint64_t _regs[num_regs]; \
} __aligned(16) name
} __aligned(16) name##_t
/* Constants to determine the size of individual context structures */
#define CTX_GPREG_ALL (CTX_GPREGS_END >> DWORD_SHIFT)
......@@ -232,31 +232,31 @@ DEFINE_REG_STRUCT(el3_state, CTX_EL3STATE_ALL);
* structure at exception entry and exit. Each instance will
* correspond to either the secure or the non-secure state.
*/
typedef struct {
gp_regs gpregs_ctx;
el3_state el3state_ctx;
el1_sys_regs sysregs_ctx;
fp_regs fpregs_ctx;
} cpu_context;
typedef struct cpu_context {
gp_regs_t gpregs_ctx;
el3_state_t el3state_ctx;
el1_sys_regs_t sysregs_ctx;
fp_regs_t fpregs_ctx;
} cpu_context_t;
/* Macros to access members of the 'cpu_context' structure */
#define get_el3state_ctx(h) (&((cpu_context *) h)->el3state_ctx)
#define get_fpregs_ctx(h) (&((cpu_context *) h)->fpregs_ctx)
#define get_sysregs_ctx(h) (&((cpu_context *) h)->sysregs_ctx)
#define get_gpregs_ctx(h) (&((cpu_context *) h)->gpregs_ctx)
/* Macros to access members of the 'cpu_context_t' structure */
#define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
#define get_fpregs_ctx(h) (&((cpu_context_t *) h)->fpregs_ctx)
#define get_sysregs_ctx(h) (&((cpu_context_t *) h)->sysregs_ctx)
#define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
/*
* Compile time assertions related to the 'cpu_context' structure to
* ensure that the assembler and the compiler view of the offsets of
* the structure members is the same.
*/
CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context, gpregs_ctx), \
CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx), \
assert_core_context_gp_offset_mismatch);
CASSERT(CTX_SYSREGS_OFFSET == __builtin_offsetof(cpu_context, sysregs_ctx), \
CASSERT(CTX_SYSREGS_OFFSET == __builtin_offsetof(cpu_context_t, sysregs_ctx), \
assert_core_context_sys_offset_mismatch);
CASSERT(CTX_FPREGS_OFFSET == __builtin_offsetof(cpu_context, fpregs_ctx), \
CASSERT(CTX_FPREGS_OFFSET == __builtin_offsetof(cpu_context_t, fpregs_ctx), \
assert_core_context_fp_offset_mismatch);
CASSERT(CTX_EL3STATE_OFFSET == __builtin_offsetof(cpu_context, el3state_ctx), \
CASSERT(CTX_EL3STATE_OFFSET == __builtin_offsetof(cpu_context_t, el3state_ctx), \
assert_core_context_el3state_offset_mismatch);
/*
......@@ -298,12 +298,12 @@ CASSERT(CTX_EL3STATE_OFFSET == __builtin_offsetof(cpu_context, el3state_ctx), \
/*******************************************************************************
* Function prototypes
******************************************************************************/
void el3_sysregs_context_save(el3_state *regs);
void el3_sysregs_context_restore(el3_state *regs);
void el1_sysregs_context_save(el1_sys_regs *regs);
void el1_sysregs_context_restore(el1_sys_regs *regs);
void fpregs_context_save(fp_regs *regs);
void fpregs_context_restore(fp_regs *regs);
void el3_sysregs_context_save(el3_state_t *regs);
void el3_sysregs_context_restore(el3_state_t *regs);
void el1_sysregs_context_save(el1_sys_regs_t *regs);
void el1_sysregs_context_restore(el1_sys_regs_t *regs);
void fpregs_context_save(fp_regs_t *regs);
void fpregs_context_restore(fp_regs_t *regs);
#undef CTX_SYSREG_ALL
#undef CTX_FP_ALL
......
include/context_mgmt.h → include/bl31/context_mgmt.h
View file @ 408c3768
......@@ -31,9 +31,8 @@
#ifndef __CM_H__
#define __CM_H__
#include <context.h>
#include <stdint.h>
#ifndef __ASSEMBLY__
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
......@@ -51,5 +50,5 @@ extern void cm_set_el3_eret_context(uint32_t security_state, uint64_t entrypoint
extern void cm_set_el3_elr(uint32_t security_state, uint64_t entrypoint);
extern void cm_set_next_eret_context(uint32_t security_state);
extern void cm_init_exception_stack(uint64_t mpidr, uint32_t security_state);
#endif /*__ASSEMBLY__*/
#endif /* __CM_H__ */
include/runtime_svc.h → include/bl31/runtime_svc.h
View file @ 408c3768
......@@ -30,8 +30,6 @@
#ifndef __RUNTIME_SVC_H__
#define __RUNTIME_SVC_H__
#include <psci.h>
#include <bl_common.h>
/*******************************************************************************
* Bit definitions inside the function id as per the SMC calling convention
......@@ -122,6 +120,10 @@
#ifndef __ASSEMBLY__
#include <cassert.h>
#include <context.h>
#include <stdint.h>
/* Various flags passed to SMC handlers */
#define SMC_FROM_SECURE (0 << 0)
#define SMC_FROM_NON_SECURE (1 << 0)
......@@ -130,7 +132,7 @@
#define is_caller_secure(_f) (!(is_caller_non_secure(_f)))
/* Prototype for runtime service initializing function */
typedef int32_t (*rt_svc_init)(void);
typedef int32_t (*rt_svc_init_t)(void);
/* Convenience macros to return from SMC handler */
#define SMC_RET1(_h, _x0) { \
......@@ -175,7 +177,7 @@ typedef int32_t (*rt_svc_init)(void);
* can be accessed using the handle pointer. The cookie parameter is reserved
* for future use
*/
typedef uint64_t (*rt_svc_handle)(uint32_t smc_fid,
typedef uint64_t (*rt_svc_handle_t)(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
......@@ -183,20 +185,20 @@ typedef uint64_t (*rt_svc_handle)(uint32_t smc_fid,
void *cookie,
void *handle,
uint64_t flags);
typedef struct {
typedef struct rt_svc_desc {
uint8_t start_oen;
uint8_t end_oen;
uint8_t call_type;
const char *name;
rt_svc_init init;
rt_svc_handle handle;
} rt_svc_desc;
rt_svc_init_t init;
rt_svc_handle_t handle;
} rt_svc_desc_t;
/*
* Convenience macro to declare a service descriptor
*/
#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \
static const rt_svc_desc __svc_desc_ ## _name \
static const rt_svc_desc_t __svc_desc_ ## _name \
__attribute__ ((section("rt_svc_descs"), used)) = { \
_start, \
_end, \
......@@ -214,11 +216,11 @@ typedef struct {
* 3. ensure that the assembler and the compiler see the handler
* routine at the same offset.
*/
CASSERT((sizeof(rt_svc_desc) == SIZEOF_RT_SVC_DESC), \
CASSERT((sizeof(rt_svc_desc_t) == SIZEOF_RT_SVC_DESC), \
assert_sizeof_rt_svc_desc_mismatch);
CASSERT(RT_SVC_DESC_INIT == __builtin_offsetof(rt_svc_desc, init), \
CASSERT(RT_SVC_DESC_INIT == __builtin_offsetof(rt_svc_desc_t, init), \
assert_rt_svc_desc_init_offset_mismatch);
CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc, handle), \
CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
assert_rt_svc_desc_handle_offset_mismatch);
......@@ -261,6 +263,7 @@ extern void runtime_svc_init();
extern uint64_t __RT_SVC_DESCS_START__;
extern uint64_t __RT_SVC_DESCS_END__;
extern uint64_t get_exception_stack(uint64_t mpidr);
extern void runtime_exceptions(void);
extern void fault_handler(void *handle);
#endif /*__ASSEMBLY__*/
#endif /* __RUNTIME_SVC_H__ */
include/psci.h → include/bl31/services/psci.h
View file @ 408c3768
......@@ -31,6 +31,7 @@
#ifndef __PSCI_H__
#define __PSCI_H__
/*******************************************************************************
* Defines for runtime services func ids
******************************************************************************/
......@@ -131,11 +132,15 @@
#define PSCI_NUM_AFFS 32ull
#ifndef __ASSEMBLY__
#include <stdint.h>
/*******************************************************************************
* Structure populated by platform specific code to export routines which
* perform common low level pm functions
******************************************************************************/
typedef struct {
typedef struct plat_pm_ops {
int (*affinst_standby)(unsigned int);
int (*affinst_on)(unsigned long,
unsigned long,
......@@ -152,7 +157,7 @@ typedef struct {
int (*affinst_suspend_finish)(unsigned long,
unsigned int,
unsigned int);
} plat_pm_ops;
} plat_pm_ops_t;
/*******************************************************************************
* Optional structure populated by the Secure Payload Dispatcher to be given a
......@@ -160,7 +165,7 @@ typedef struct {
* operation. It also allows PSCI to determine certain properties of the SP e.g.
* migrate capability etc.
******************************************************************************/
typedef struct {
typedef struct spd_pm_ops {
void (*svc_on)(uint64_t target_cpu);
int32_t (*svc_off)(uint64_t __unused);
void (*svc_suspend)(uint64_t power_state);
......@@ -168,7 +173,7 @@ typedef struct {
void (*svc_suspend_finish)(uint64_t suspend_level);
void (*svc_migrate)(uint64_t __unused1, uint64_t __unused2);
int32_t (*svc_migrate_info)(uint64_t *__unused);
} spd_pm_ops;
} spd_pm_ops_t;
/*******************************************************************************
* Function & Data prototypes
......@@ -187,10 +192,23 @@ extern int psci_cpu_on(unsigned long,
unsigned long);
extern void psci_aff_on_finish_entry(void);
extern void psci_aff_suspend_finish_entry(void);
extern void psci_register_spd_pm_hook(const spd_pm_ops *);
extern void psci_register_spd_pm_hook(const spd_pm_ops_t *);
extern int psci_get_suspend_stateid(unsigned long mpidr);
extern int psci_get_suspend_afflvl(unsigned long mpidr);
extern uint64_t psci_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
/* PSCI setup function */
extern int32_t psci_setup(void);
#endif /*__ASSEMBLY__*/
......
include/bl32.h → include/bl32/bl32.h
View file @ 408c3768
......@@ -31,15 +31,18 @@
#ifndef __BL32_H__
#define __BL32_H__
#ifndef __ASSEMBLY__
#include <stdint.h>
#include <bl_common.h>
/******************************************
* Forward declarations
*****************************************/
struct meminfo;
/******************************************
* Function prototypes
*****************************************/
extern void bl32_platform_setup(void);
extern meminfo *bl32_plat_sec_mem_layout(void);
extern struct meminfo *bl32_plat_sec_mem_layout(void);
extern uint64_t bl32_main(void);
#endif /* __ASSEMBLY__ */
#endif /* __BL32_H__ */
include/tsp.h → include/bl32/payloads/tsp.h
View file @ 408c3768
......@@ -31,9 +31,6 @@
#ifndef __TSP_H__
#define __TSP_H__
#include <bl_common.h>
#include <platform.h>
/*
* SMC function IDs that TSP uses to signal various forms of completions
* to the secure payload dispatcher.
......@@ -86,9 +83,12 @@
#define TSP_ARGS_END 0x40
#ifndef __ASSEMBLY__
#include <cassert.h>
#include <platform.h> /* For CACHE_WRITEBACK_GRANULE */
#include <stdint.h>
typedef void (*tsp_generic_fptr)(uint64_t arg0,
typedef void (*tsp_generic_fptr_t)(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
uint64_t arg3,
......@@ -97,26 +97,26 @@ typedef void (*tsp_generic_fptr)(uint64_t arg0,
uint64_t arg6,
uint64_t arg7);
typedef struct {
tsp_generic_fptr fast_smc_entry;
tsp_generic_fptr cpu_on_entry;
tsp_generic_fptr cpu_off_entry;
tsp_generic_fptr cpu_resume_entry;
tsp_generic_fptr cpu_suspend_entry;
} entry_info;
typedef struct entry_info {
tsp_generic_fptr_t fast_smc_entry;
tsp_generic_fptr_t cpu_on_entry;
tsp_generic_fptr_t cpu_off_entry;
tsp_generic_fptr_t cpu_resume_entry;
tsp_generic_fptr_t cpu_suspend_entry;
} entry_info_t;
typedef struct {
typedef struct work_statistics {
uint32_t smc_count; /* Number of returns on this cpu */
uint32_t eret_count; /* Number of entries on this cpu */
uint32_t cpu_on_count; /* Number of cpu on requests */
uint32_t cpu_off_count; /* Number of cpu off requests */
uint32_t cpu_suspend_count; /* Number of cpu suspend requests */
uint32_t cpu_resume_count; /* Number of cpu resume requests */
} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics;
} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
typedef struct {
typedef struct tsp_args {
uint64_t _regs[TSP_ARGS_END >> 3];
} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args;
} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
/* Macros to access members of the above structure using their offsets */
#define read_sp_arg(args, offset) ((args)->_regs[offset >> 3])
......@@ -127,7 +127,7 @@ typedef struct {
* Ensure that the assembler's view of the size of the tsp_args is the
* same as the compilers
*/
CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args), assert_sp_args_size_mismatch);
CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
extern void tsp_get_magic(uint64_t args[4]);
......@@ -147,7 +147,7 @@ extern void tsp_cpu_resume_entry(uint64_t arg0,
uint64_t arg5,
uint64_t arg6,
uint64_t arg7);
extern tsp_args *tsp_cpu_resume_main(uint64_t arg0,
extern tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
uint64_t arg3,
......@@ -163,7 +163,7 @@ extern void tsp_cpu_suspend_entry(uint64_t arg0,
uint64_t arg5,
uint64_t arg6,
uint64_t arg7);
extern tsp_args *tsp_cpu_suspend_main(uint64_t arg0,
extern tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
uint64_t arg3,
......@@ -179,7 +179,7 @@ extern void tsp_cpu_on_entry(uint64_t arg0,
uint64_t arg5,
uint64_t arg6,
uint64_t arg7);
extern tsp_args *tsp_cpu_on_main(void);
extern tsp_args_t *tsp_cpu_on_main(void);
extern void tsp_cpu_off_entry(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
......@@ -188,7 +188,7 @@ extern void tsp_cpu_off_entry(uint64_t arg0,
uint64_t arg5,
uint64_t arg6,
uint64_t arg7);
extern tsp_args *tsp_cpu_off_main(uint64_t arg0,
extern tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
uint64_t arg3,
......
include/asm_macros.S → include/common/asm_macros.S
View file @ 408c3768
......@@ -28,6 +28,9 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch.h>
.macro func_prologue
stp x29, x30, [sp, #-0x10]!
mov x29,sp
......
include/bl_common.h → include/common/bl_common.h
View file @ 408c3768
......@@ -48,14 +48,6 @@
#define BOT_LOAD !TOP_LOAD
#define LOAD_MASK (1 << 0)
/*******************************************************************************
* Macro to flag a compile time assertion. It uses the preprocessor to generate
* an invalid C construct if 'cond' evaluates to false.
* The following compilation error is triggered if the assertion fails:
* "error: size of array 'msg' is negative"
******************************************************************************/
#define CASSERT(cond, msg) typedef char msg[(cond) ? 1 : -1]
/******************************************************************************
* Opcode passed in x0 to tell next EL that we want to run an image.
* Corresponds to the function ID of the only SMC that the BL1 exception
......@@ -66,22 +58,23 @@
#ifndef __ASSEMBLY__
#include <stdio.h>
#include <cdefs.h> /* For __dead2 */
/*******************************************************************************
* Structure used for telling the next BL how much of a particular type of
* memory is available for its use and how much is already used.
******************************************************************************/
typedef struct {
typedef struct meminfo {
unsigned long total_base;
long total_size;
unsigned long free_base;
long free_size;
unsigned long attr;
unsigned long next;
} meminfo;
} meminfo_t;
typedef struct {
typedef struct aapcs64_params {
unsigned long arg0;
unsigned long arg1;
unsigned long arg2;
......@@ -90,56 +83,59 @@ typedef struct {
unsigned long arg5;
unsigned long arg6;
unsigned long arg7;
} aapcs64_params;
} aapcs64_params_t;
/*******************************************************************************
* This structure represents the superset of information needed while switching
* exception levels. The only two mechanisms to do so are ERET & SMC. In case of
* SMC all members apart from 'aapcs64_params' will be ignored.
******************************************************************************/
typedef struct {
typedef struct el_change_info {
unsigned long entrypoint;
unsigned long spsr;
unsigned long security_state;
aapcs64_params args;
} el_change_info;
aapcs64_params_t args;
} el_change_info_t;
/*******************************************************************************
* This structure represents the superset of information that can be passed to
* BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
* populated only if BL2 detects its presence.
******************************************************************************/
typedef struct {
meminfo bl31_meminfo;
el_change_info bl32_image_info;
meminfo bl32_meminfo;
el_change_info bl33_image_info;
meminfo bl33_meminfo;
} bl31_args;
typedef struct bl31_args {
meminfo_t bl31_meminfo;
el_change_info_t bl32_image_info;
meminfo_t bl32_meminfo;
el_change_info_t bl33_image_info;
meminfo_t bl33_meminfo;
} bl31_args_t;
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
extern unsigned long page_align(unsigned long, unsigned);
extern void change_security_state(unsigned int);
extern void __dead2 drop_el(aapcs64_params *, unsigned long, unsigned long);
extern void __dead2 raise_el(aapcs64_params *);
extern void __dead2 change_el(el_change_info *);
extern void __dead2 drop_el(aapcs64_params_t *, unsigned long, unsigned long);
extern void __dead2 raise_el(aapcs64_params_t *);
extern void __dead2 change_el(el_change_info_t *);
extern unsigned long make_spsr(unsigned long, unsigned long, unsigned long);
extern void init_bl2_mem_layout(meminfo *,
meminfo *,
unsigned int,
unsigned long) __attribute__((weak));
extern void init_bl31_mem_layout(const meminfo *,
meminfo *,
unsigned int) __attribute__((weak));
extern void init_bl2_mem_layout(meminfo_t *,
meminfo_t *,
unsigned int,
unsigned long) __attribute__((weak));
extern void init_bl31_mem_layout(const meminfo_t *,
meminfo_t *,
unsigned int) __attribute__((weak));
extern unsigned long image_size(const char *);
extern unsigned long load_image(meminfo *, const char *, unsigned int, unsigned long);
extern unsigned long load_image(meminfo_t *,
const char *,
unsigned int,
unsigned long);
extern void __dead2 run_image(unsigned long entrypoint,
unsigned long spsr,
unsigned long security_state,
void *first_arg,
void *second_arg);
unsigned long spsr,
unsigned long security_state,
void *first_arg,
void *second_arg);
extern unsigned long *get_el_change_mem_ptr(void);
extern const char build_message[];
......
include/debug.h → include/common/debug.h
View file @ 408c3768
......@@ -31,9 +31,6 @@
#ifndef __DEBUG_H__
#define __DEBUG_H__
/* Do not try to call this from ASM code. */
#ifndef __ASSEMBLY__
#include <stdio.h>
/* If building the project with DEBUG disabled the INFO and WARN macros
......@@ -66,5 +63,4 @@ static inline void __attribute__((noreturn)) panic(void)
;
}
#endif /* __ASSEMBLY__ */
#endif /* __DEBUG_H__ */
include/firmware_image_package.h → include/common/firmware_image_package.h
View file @ 408c3768
......@@ -50,17 +50,17 @@
#define UUID_NON_TRUSTED_FIRMWARE_BL33 \
{0xa7eed0d6, 0xeafc, 0x4bd5, 0x97, 0x82, {0x99, 0x34, 0xf2, 0x34, 0xb6, 0xe4} }
typedef struct {
typedef struct fip_toc_header {
uint32_t name;
uint32_t serial_number;
uint64_t flags;
} fip_toc_header;
} fip_toc_header_t;
typedef struct {
typedef struct fip_toc_entry {
uuid_t uuid;
uint64_t offset_address;
uint64_t size;
uint64_t flags;
} fip_toc_entry;
} fip_toc_entry_t;
#endif /* __FIRMWARE_IMAGE_PACKAGE_H__ */
arch/system/gic/gic.h → include/drivers/arm/gic_v2.h
View file @ 408c3768
......@@ -28,10 +28,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __GIC_H__
#define __GIC_H__
#ifndef __GIC_V2_H__
#define __GIC_V2_H__
#define MAX_SPIS 480
#define GIC400_NUM_SPIS 480
#define MAX_PPIS 14
#define MAX_SGIS 16
......@@ -131,31 +132,13 @@
#define GICV_HIGHESTPEND 0x18
#define GICV_DEACTIVATE 0x1000
/* GICv3 Re-distributor interface registers & shifts */
#define GICR_PCPUBASE_SHIFT 0x11
#define GICR_TYPER 0x08
#define GICR_WAKER 0x14
/* GICR_WAKER bit definitions */
#define WAKER_CA (1UL << 2)
#define WAKER_PS (1UL << 1)
/* GICR_TYPER bit definitions */
#define GICR_TYPER_AFF_SHIFT 32
#define GICR_TYPER_AFF_MASK 0xffffffff
#define GICR_TYPER_LAST (1UL << 4)
/* GICv3 ICC_SRE register bit definitions*/
#define ICC_SRE_EN (1UL << 3)
#define ICC_SRE_SRE (1UL << 0)
#ifndef __ASSEMBLY__
#include <gic_v2.h>
#include <gic_v3.h>
#include <mmio.h>
/*******************************************************************************
* Function prototypes
* GIC Distributor function prototypes
******************************************************************************/
extern unsigned int gicd_read_igroupr(unsigned int, unsigned int);
......@@ -194,17 +177,127 @@ extern void gicd_set_icactiver(unsigned int, unsigned int);
extern void gicd_set_ipriorityr(unsigned int, unsigned int, unsigned int);
extern void gicd_set_itargetsr(unsigned int, unsigned int, unsigned int);
/* GICv3 functions */
extern unsigned int read_icc_sre_el1(void);
extern unsigned int read_icc_sre_el2(void);
extern unsigned int read_icc_sre_el3(void);
extern void write_icc_sre_el1(unsigned int);
extern void write_icc_sre_el2(unsigned int);
extern void write_icc_sre_el3(unsigned int);
extern void write_icc_pmr_el1(unsigned int);
/*******************************************************************************
* GIC Distributor interface accessors for reading entire registers
******************************************************************************/
#endif /*__ASSEMBLY__*/
static inline unsigned int gicd_read_ctlr(unsigned int base)
{
return mmio_read_32(base + GICD_CTLR);
}
static inline unsigned int gicd_read_typer(unsigned int base)
{
return mmio_read_32(base + GICD_TYPER);
}
static inline unsigned int gicd_read_sgir(unsigned int base)
{
return mmio_read_32(base + GICD_SGIR);
}
/*******************************************************************************
* GIC Distributor interface accessors for writing entire registers
******************************************************************************/
static inline void gicd_write_ctlr(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICD_CTLR, val);
}
static inline void gicd_write_sgir(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICD_SGIR, val);
}
/*******************************************************************************
* GIC CPU interface accessors for reading entire registers
******************************************************************************/
#endif /* __GIC_H__ */
static inline unsigned int gicc_read_ctlr(unsigned int base)
{
return mmio_read_32(base + GICC_CTLR);
}
static inline unsigned int gicc_read_pmr(unsigned int base)
{
return mmio_read_32(base + GICC_PMR);
}
static inline unsigned int gicc_read_BPR(unsigned int base)
{
return mmio_read_32(base + GICC_BPR);
}
static inline unsigned int gicc_read_IAR(unsigned int base)
{
return mmio_read_32(base + GICC_IAR);
}
static inline unsigned int gicc_read_EOIR(unsigned int base)
{
return mmio_read_32(base + GICC_EOIR);
}
static inline unsigned int gicc_read_hppir(unsigned int base)
{
return mmio_read_32(base + GICC_HPPIR);
}
static inline unsigned int gicc_read_dir(unsigned int base)
{
return mmio_read_32(base + GICC_DIR);
}
static inline unsigned int gicc_read_iidr(unsigned int base)
{
return mmio_read_32(base + GICC_IIDR);
}
/*******************************************************************************
* GIC CPU interface accessors for writing entire registers
******************************************************************************/
static inline void gicc_write_ctlr(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_CTLR, val);
}
static inline void gicc_write_pmr(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_PMR, val);
}
static inline void gicc_write_BPR(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_BPR, val);
}
static inline void gicc_write_IAR(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_IAR, val);
}
static inline void gicc_write_EOIR(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_EOIR, val);
}
static inline void gicc_write_hppir(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_HPPIR, val);
}
static inline void gicc_write_dir(unsigned int base, unsigned int val)
{
mmio_write_32(base + GICC_DIR, val);
}
#endif /*__ASSEMBLY__*/
#endif /* __GIC_V2_H__ */
arch/system/gic/gic_v3.h → include/drivers/arm/gic_v3.h
View file @ 408c3768
......@@ -31,9 +31,31 @@
#ifndef __GIC_V3_H__
#define __GIC_V3_H__
#include <stdint.h>
#include <mmio.h>
#include <stdint.h>
/* GICv3 Re-distributor interface registers & shifts */
#define GICR_PCPUBASE_SHIFT 0x11
#define GICR_TYPER 0x08
#define GICR_WAKER 0x14
/* GICR_WAKER bit definitions */
#define WAKER_CA (1UL << 2)
#define WAKER_PS (1UL << 1)
/* GICR_TYPER bit definitions */
#define GICR_TYPER_AFF_SHIFT 32
#define GICR_TYPER_AFF_MASK 0xffffffff
#define GICR_TYPER_LAST (1UL << 4)
/* GICv3 ICC_SRE register bit definitions*/
#define ICC_SRE_EN (1UL << 3)
#define ICC_SRE_SRE (1UL << 0)
/*******************************************************************************
* GICv3 defintions
******************************************************************************/
#define GICV3_AFFLVL_MASK 0xff
#define GICV3_AFF0_SHIFT 0
#define GICV3_AFF1_SHIFT 8
......@@ -41,8 +63,19 @@
#define GICV3_AFF3_SHIFT 24
#define GICV3_AFFINITY_MASK 0xffffffff
/*******************************************************************************
* Function prototypes
******************************************************************************/
uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr);
extern unsigned int read_icc_sre_el1(void);
extern unsigned int read_icc_sre_el2(void);
extern unsigned int read_icc_sre_el3(void);
extern void write_icc_sre_el1(unsigned int);
extern void write_icc_sre_el2(unsigned int);
extern void write_icc_sre_el3(unsigned int);
extern void write_icc_pmr_el1(unsigned int);
/*******************************************************************************
* GIC Redistributor interface accessors
******************************************************************************/
......
drivers/arm/peripherals/pl011/pl011.h → include/drivers/arm/pl011.h
View file @ 408c3768
......@@ -31,6 +31,9 @@
#ifndef __PL011_H__
#define __PL011_H__
#include <mmio.h>
/* PL011 Registers */
#define UARTDR 0x000
#define UARTRSR 0x004
......
drivers/arm/interconnect/tzc-400/tzc400.h → include/drivers/arm/tzc400.h
View file @ 408c3768
......@@ -147,8 +147,6 @@
/* Filters are bit mapped 0 to 3. */
#define TZC400_COMPONENT_ID 0xb105f00d
#ifndef __ASSEMBLY__
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
......@@ -165,23 +163,23 @@
* TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync
* external data abort
*/
enum tzc_action {
typedef enum {
TZC_ACTION_NONE = 0,
TZC_ACTION_ERR = 1,
TZC_ACTION_INT = 2,
TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT)
};
} tzc_action_t;
/*
* Controls secure access to a region. If not enabled secure access is not
* allowed to region.
*/
enum tzc_region_attributes {
typedef enum {
TZC_REGION_S_NONE = 0,
TZC_REGION_S_RD = 1,
TZC_REGION_S_WR = 2,
TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR)
};
} tzc_region_attributes_t;
/*
* Implementation defined values used to validate inputs later.
......@@ -189,23 +187,21 @@ enum tzc_region_attributes {
* Regions : max of 9 ; 0 to 8
* Address width : Values between 32 to 64
*/
struct tzc_instance {
typedef struct tzc_instance {
uint64_t base;
uint32_t aid_width;
uint8_t addr_width;
uint8_t num_filters;
uint8_t num_regions;
};
} tzc_instance_t ;
void tzc_init(struct tzc_instance *controller);
void tzc_configure_region(const struct tzc_instance *controller, uint32_t filters,
void tzc_init(tzc_instance_t *controller);
void tzc_configure_region(const tzc_instance_t *controller, uint32_t filters,
uint8_t region, uint64_t region_base, uint64_t region_top,
enum tzc_region_attributes sec_attr, uint32_t ns_device_access);
void tzc_enable_filters(const struct tzc_instance *controller);
void tzc_disable_filters(const struct tzc_instance *controller);
void tzc_set_action(const struct tzc_instance *controller,
enum tzc_action action);
tzc_region_attributes_t sec_attr, uint32_t ns_device_access);
void tzc_enable_filters(const tzc_instance_t *controller);
void tzc_disable_filters(const tzc_instance_t *controller);
void tzc_set_action(const tzc_instance_t *controller, tzc_action_t action);
#endif /*__ASSEMBLY__*/
#endif /* __TZC400__ */
drivers/io/io_driver.h → include/drivers/io_driver.h
View file @ 408c3768
......@@ -31,63 +31,65 @@
#ifndef __IO_DRIVER_H__
#define __IO_DRIVER_H__
#include "platform.h" /* For MAX_IO_DEVICES */
#include <io_storage.h>
#include <platform.h> /* For MAX_IO_DEVICES */
#include <stdint.h>
/* Generic IO entity structure,representing an accessible IO construct on the
* device, such as a file */
struct io_entity {
typedef struct io_entity {
io_dev_handle dev_handle;
uintptr_t info;
};
} io_entity_t;
/* Device info structure, providing device-specific functions and a means of
* adding driver-specific state */
struct io_dev_info {
typedef struct io_dev_info {
struct io_dev_funcs *funcs;
uintptr_t info;
};
} io_dev_info_t;
/* Structure used to create a connection to a type of device */
struct io_dev_connector {
typedef struct io_dev_connector {
/* dev_open opens a connection to a particular device driver */
int (*dev_open)(void *spec, struct io_dev_info **dev_info);
};
int (*dev_open)(void *spec, io_dev_info_t **dev_info);
} io_dev_connector_t;
/* Structure to hold device driver function pointers */
struct io_dev_funcs {
io_type (*type)(void);
int (*open)(struct io_dev_info *dev_info, const void *spec,
struct io_entity *entity);
int (*seek)(struct io_entity *entity, int mode, ssize_t offset);
int (*size)(struct io_entity *entity, size_t *length);
int (*read)(struct io_entity *entity, void *buffer, size_t length,
typedef struct io_dev_funcs {
io_type_t (*type)(void);
int (*open)(io_dev_info_t *dev_info, const void *spec,
io_entity_t *entity);
int (*seek)(io_entity_t *entity, int mode, ssize_t offset);
int (*size)(io_entity_t *entity, size_t *length);
int (*read)(io_entity_t *entity, void *buffer, size_t length,
size_t *length_read);
int (*write)(struct io_entity *entity, const void *buffer,
int (*write)(io_entity_t *entity, const void *buffer,
size_t length, size_t *length_written);
int (*close)(struct io_entity *entity);
int (*dev_init)(struct io_dev_info *dev_info, const void *init_params);
int (*dev_close)(struct io_dev_info *dev_info);
};
int (*close)(io_entity_t *entity);
int (*dev_init)(io_dev_info_t *dev_info, const void *init_params);
int (*dev_close)(io_dev_info_t *dev_info);
} io_dev_funcs_t;
/* IO platform data - used to track devices registered for a specific
* platform */
struct io_plat_data {
struct io_dev_info *devices[MAX_IO_DEVICES];
typedef struct io_plat_data {
io_dev_info_t *devices[MAX_IO_DEVICES];
unsigned int dev_count;
};
} io_plat_data_t;
/* Operations intended to be performed during platform initialisation */
/* Initialise the IO layer */
void io_init(struct io_plat_data *data);
void io_init(io_plat_data_t *data);
/* Register a device driver */
int io_register_device(struct io_dev_info *dev_info);
int io_register_device(io_dev_info_t *dev_info);
#endif /* __IO_DRIVER_H__ */
drivers/io/io_fip.h → include/drivers/io_fip.h
View file @ 408c3768
......@@ -31,6 +31,8 @@
#ifndef __IO_FIP_H__
#define __IO_FIP_H__
struct io_dev_connector;
int register_io_dev_fip(struct io_dev_connector **dev_con);
#endif /* __IO_FIP_H__ */
drivers/io/io_memmap.h → include/drivers/io_memmap.h
View file @ 408c3768
......@@ -31,6 +31,8 @@
#ifndef __IO_MEMMAP_H__
#define __IO_MEMMAP_H__
struct io_dev_connector;
int register_io_dev_memmap(struct io_dev_connector **dev_con);
#endif /* __IO_MEMMAP_H__ */
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