Merge pull request #48 from danh-arm/dh/major-refactoring

dh/major refactoring

lib/semihosting/semihosting.c

@@ -29,10 +29,9 @@
  */
 
 #include <assert.h>
-#include <string.h>
 #include <errno.h>
-#include <stdio.h>
 #include <semihosting.h>
+#include <string.h>
 
 #ifndef SEMIHOSTING_SUPPORTED
 #define SEMIHOSTING_SUPPORTED  1
@@ -45,23 +44,23 @@ typedef struct {
 	const char *file_name;
 	unsigned long mode;
 	size_t name_length;
-} smh_file_open_block;
+} smh_file_open_block_t;
 
 typedef struct {
 	long handle;
 	void *buffer;
 	size_t length;
-} smh_file_read_write_block;
+} smh_file_read_write_block_t;
 
 typedef struct {
 	long handle;
 	ssize_t location;
-} smh_file_seek_block;
+} smh_file_seek_block_t;
 
 typedef struct {
 	char *command_line;
 	size_t command_length;
-} smh_system_block;
+} smh_system_block_t;
 
 long semihosting_connection_supported(void)
 {
@@ -70,7 +69,7 @@ long semihosting_connection_supported(void)
 
 long semihosting_file_open(const char *file_name, size_t mode)
 {
-	smh_file_open_block open_block;
+	smh_file_open_block_t open_block;
 
 	open_block.file_name = file_name;
 	open_block.mode = mode;
@@ -82,7 +81,7 @@ long semihosting_file_open(const char *file_name, size_t mode)
 
 long semihosting_file_seek(long file_handle, ssize_t offset)
 {
-	smh_file_seek_block seek_block;
+	smh_file_seek_block_t seek_block;
 	long result;
 
 	seek_block.handle = file_handle;
@@ -99,7 +98,7 @@ long semihosting_file_seek(long file_handle, ssize_t offset)
 
 long semihosting_file_read(long file_handle, size_t *length, void *buffer)
 {
-	smh_file_read_write_block read_block;
+	smh_file_read_write_block_t read_block;
 	long result = -EINVAL;
 
 	if ((length == NULL) || (buffer == NULL))
@@ -125,7 +124,7 @@ long semihosting_file_write(long file_handle,
 			    size_t *length,
 			    const void *buffer)
 {
-	smh_file_read_write_block write_block;
+	smh_file_read_write_block_t write_block;
 
 	if ((length == NULL) || (buffer == NULL))
 		return -EINVAL;
@@ -169,7 +168,7 @@ void semihosting_write_string(char *string)
 
 long semihosting_system(char *command_line)
 {
-	smh_system_block system_block;
+	smh_system_block_t system_block;
 
 	system_block.command_line = command_line;
 	system_block.command_length = strlen(command_line);

plat/common/aarch64/platform_helpers.S

@@ -29,8 +29,8 @@
  */
 
 #include <arch.h>
-#include <platform.h>
 #include <asm_macros.S>
+#include <platform.h>
 
 
 	.weak	platform_get_core_pos

plat/common/aarch64/platform_mp_stack.S

@@ -29,8 +29,8 @@
  */
 
 #include <arch.h>
-#include <platform.h>
 #include <asm_macros.S>
+#include <platform.h>
 
 
 	.local	pcpu_dv_mem_stack

plat/common/aarch64/platform_up_stack.S

@@ -29,8 +29,8 @@
  */
 
 #include <arch.h>
-#include <platform.h>
 #include <asm_macros.S>
+#include <platform.h>
 
 
 	.local	pcpu_dv_mem_stack

plat/fvp/aarch64/bl1_plat_helpers.S

@@ -29,10 +29,10 @@
  */
 
 #include <arch.h>
-#include <platform.h>
-#include <fvp_pwrc.h>
-#include <gic.h>
 #include <asm_macros.S>
+#include <gic_v2.h>
+#include <platform.h>
+#include "../drivers/pwrc/fvp_pwrc.h"
 
 	.globl	platform_get_entrypoint
 	.globl	platform_cold_boot_init

plat/fvp/aarch64/plat_common.c

@@ -28,9 +28,12 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <assert.h>
+#include <arch.h>
 #include <arch_helpers.h>
-#include "debug.h"
+#include <assert.h>
+#include <bl_common.h>
+#include <debug.h>
+#include <mmio.h>
 #include <platform.h>
 #include <xlat_tables.h>
 
@@ -122,7 +125,7 @@ void disable_mmu(void)
  * This doesn't include TZRAM as the 'mem_layout' argument passed to to
  * configure_mmu() will give the available subset of that,
  */
-const mmap_region fvp_mmap[] = {
+const mmap_region_t fvp_mmap[] = {
 	{ TZROM_BASE,	TZROM_SIZE,	MT_MEMORY | MT_RO | MT_SECURE },
 	{ TZDRAM_BASE,	TZDRAM_SIZE,	MT_MEMORY | MT_RW | MT_SECURE },
 	{ FLASH0_BASE,	FLASH0_SIZE,	MT_MEMORY | MT_RO | MT_SECURE },
@@ -140,7 +143,7 @@ const mmap_region fvp_mmap[] = {
 /*******************************************************************************
  * Setup the pagetables as per the platform memory map & initialize the mmu
  *******************************************************************************/
-void configure_mmu(meminfo *mem_layout,
+void configure_mmu(meminfo_t *mem_layout,
 		   unsigned long ro_start,
 		   unsigned long ro_limit,
 		   unsigned long coh_start,

plat/fvp/aarch64/plat_helpers.S

@@ -29,8 +29,9 @@
  */
 
 #include <arch.h>
-#include <platform.h>
 #include <asm_macros.S>
+#include <bl_common.h>
+#include <platform.h>
 
 	.globl	plat_report_exception
 

plat/fvp/bl1_plat_setup.c

@@ -28,12 +28,14 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <assert.h>
 #include <arch_helpers.h>
-#include <platform.h>
+#include <assert.h>
+#include <bl_common.h>
 #include <bl1.h>
 #include <console.h>
 #include <cci400.h>
+#include <mmio.h>
+#include <platform.h>
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -60,9 +62,9 @@ extern unsigned long __BL1_RAM_END__;
 
 
 /* Data structure which holds the extents of the trusted SRAM for BL1*/
-static meminfo bl1_tzram_layout;
+static meminfo_t bl1_tzram_layout;
 
-meminfo *bl1_plat_sec_mem_layout(void)
+meminfo_t *bl1_plat_sec_mem_layout(void)
 {
 	return &bl1_tzram_layout;
 }

plat/fvp/bl2_plat_setup.c

@@ -28,12 +28,12 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <assert.h>
 #include <arch_helpers.h>
-#include <platform.h>
-#include <bl2.h>
+#include <assert.h>
 #include <bl_common.h>
+#include <bl2.h>
 #include <console.h>
+#include <platform.h>
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -68,7 +68,7 @@ extern unsigned long __COHERENT_RAM_END__;
 extern unsigned char **bl2_el_change_mem_ptr;
 
 /* Data structure which holds the extents of the trusted SRAM for BL2 */
-static meminfo bl2_tzram_layout
+static meminfo_t bl2_tzram_layout
 __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
 		section("tzfw_coherent_mem")));
 
@@ -76,9 +76,9 @@ __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
  * Reference to structure which holds the arguments which need to be passed
  * to BL31
  ******************************************************************************/
-static bl31_args *bl2_to_bl31_args;
+static bl31_args_t *bl2_to_bl31_args;
 
-meminfo *bl2_plat_sec_mem_layout(void)
+meminfo_t *bl2_plat_sec_mem_layout(void)
 {
 	return &bl2_tzram_layout;
 }
@@ -87,7 +87,7 @@ meminfo *bl2_plat_sec_mem_layout(void)
  * This function returns a pointer to the memory that the platform has kept
  * aside to pass all the information that BL31 could need.
  ******************************************************************************/
-bl31_args *bl2_get_bl31_args_ptr(void)
+bl31_args_t *bl2_get_bl31_args_ptr(void)
 {
 	return bl2_to_bl31_args;
 }
@@ -97,7 +97,7 @@ bl31_args *bl2_get_bl31_args_ptr(void)
  * in x0. This memory layout is sitting at the base of the free trusted SRAM.
  * Copy it to a safe loaction before its reclaimed by later BL2 functionality.
  ******************************************************************************/
-void bl2_early_platform_setup(meminfo *mem_layout,
+void bl2_early_platform_setup(meminfo_t *mem_layout,
 			      void *data)
 {
 	/* Setup the BL2 memory layout */
@@ -137,10 +137,10 @@ void bl2_platform_setup()
 	 * Ensure that the secure DRAM memory used for passing BL31 arguments
 	 * does not overlap with the BL32_BASE.
 	 */
-	assert (BL32_BASE > TZDRAM_BASE + sizeof(bl31_args));
+	assert (BL32_BASE > TZDRAM_BASE + sizeof(bl31_args_t));
 
 	/* Use the Trusted DRAM for passing args to BL31 */
-	bl2_to_bl31_args = (bl31_args *) TZDRAM_BASE;
+	bl2_to_bl31_args = (bl31_args_t *) TZDRAM_BASE;
 
 	/* Populate the extents of memory available for loading BL33 */
 	bl2_to_bl31_args->bl33_meminfo.total_base = DRAM_BASE;

plat/fvp/bl31_plat_setup.c

@@ -28,10 +28,14 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <platform.h>
 #include <arch.h>
-#include <fvp_pwrc.h>
+#include <bl_common.h>
+#include <bl31.h>
 #include <console.h>
+#include <mmio.h>
+#include <platform.h>
+#include <stddef.h>
+#include "drivers/pwrc/fvp_pwrc.h"
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -66,14 +70,14 @@ extern unsigned long __COHERENT_RAM_END__;
  * Reference to structure which holds the arguments that have been passed to
  * BL31 from BL2.
  ******************************************************************************/
-static bl31_args *bl2_to_bl31_args;
+static bl31_args_t *bl2_to_bl31_args;
 
-meminfo *bl31_plat_sec_mem_layout(void)
+meminfo_t *bl31_plat_sec_mem_layout(void)
 {
 	return &bl2_to_bl31_args->bl31_meminfo;
 }
 
-meminfo *bl31_plat_get_bl32_mem_layout(void)
+meminfo_t *bl31_plat_get_bl32_mem_layout(void)
 {
 	return &bl2_to_bl31_args->bl32_meminfo;
 }
@@ -84,9 +88,9 @@ meminfo *bl31_plat_get_bl32_mem_layout(void)
  * while BL32 corresponds to the secure image type. A NULL pointer is returned
  * if the image does not exist.
  ******************************************************************************/
-el_change_info *bl31_get_next_image_info(uint32_t type)
+el_change_info_t *bl31_get_next_image_info(uint32_t type)
 {
-	el_change_info *next_image_info;
+	el_change_info_t *next_image_info;
 
 	next_image_info = (type == NON_SECURE) ?
 		&bl2_to_bl31_args->bl33_image_info :
@@ -110,7 +114,7 @@ el_change_info *bl31_get_next_image_info(uint32_t type)
  * has flushed this information to memory, so we are guaranteed to pick up good
  * data
  ******************************************************************************/
-void bl31_early_platform_setup(bl31_args *from_bl2,
+void bl31_early_platform_setup(bl31_args_t *from_bl2,
 			       void *data)
 {
 	bl2_to_bl31_args = from_bl2;

plat/fvp/bl32_plat_setup.c

@@ -28,13 +28,11 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <string.h>
-#include <assert.h>
 #include <arch_helpers.h>
-#include <platform.h>
-#include <bl32.h>
 #include <bl_common.h>
+#include <bl32.h>
 #include <console.h>
+#include <platform.h>
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -66,11 +64,11 @@ extern unsigned long __COHERENT_RAM_END__;
 #define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
 
 /* Data structure which holds the extents of the trusted SRAM for BL32 */
-static meminfo bl32_tzdram_layout
+static meminfo_t bl32_tzdram_layout
 __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
 		section("tzfw_coherent_mem")));
 
-meminfo *bl32_plat_sec_mem_layout(void)
+meminfo_t *bl32_plat_sec_mem_layout(void)
 {
 	return &bl32_tzdram_layout;
 }
@@ -79,7 +77,7 @@ meminfo *bl32_plat_sec_mem_layout(void)
  * BL1 has passed the extents of the trusted SRAM that's at BL32's disposal.
  * Initialize the BL32 data structure with the memory extends
  ******************************************************************************/
-void bl32_early_platform_setup(meminfo *mem_layout,
+void bl32_early_platform_setup(meminfo_t *mem_layout,
 			      void *data)
 {
 	/* Setup the BL32 memory layout */

drivers/power/fvp_pwrc.c → plat/fvp/drivers/pwrc/fvp_pwrc.c

@@ -28,20 +28,15 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <string.h>
-#include <stdio.h>
-#include <errno.h>
-#include <assert.h>
-#include <arch_helpers.h>
-#include <platform.h>
-#include <fvp_pwrc.h>
 #include <bakery_lock.h>
+#include <mmio.h>
+#include "fvp_pwrc.h"
 
 /*
  * TODO: Someday there will be a generic power controller api. At the moment
  * each platform has its own pwrc so just exporting functions is fine.
  */
-static bakery_lock pwrc_lock __attribute__ ((section("tzfw_coherent_mem")));
+static bakery_lock_t pwrc_lock __attribute__ ((section("tzfw_coherent_mem")));
 
 unsigned int fvp_pwrc_get_cpu_wkr(unsigned long mpidr)
 {

plat/fvp/plat_gic.c

@@ -28,11 +28,12 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <stdint.h>
 #include <arch_helpers.h>
-#include <platform.h>
-#include <gic.h>
 #include <debug.h>
+#include <gic_v2.h>
+#include <gic_v3.h>
+#include <platform.h>
+#include <stdint.h>
 
 
 /*******************************************************************************

plat/fvp/plat_io_storage.c

@@ -29,51 +29,51 @@
  */
 
 #include <assert.h>
+#include <debug.h>
+#include <io_driver.h>
+#include <io_fip.h>
+#include <io_memmap.h>
+#include <io_storage.h>
+#include <io_semihosting.h>
+#include <platform.h>
+#include <semihosting.h>	/* For FOPEN_MODE_... */
 #include <string.h>
-#include "platform.h"
-#include "io_storage.h"
-#include "io_driver.h"
-#include "io_semihosting.h"
-#include "semihosting.h"	/* For FOPEN_MODE_... */
-#include "io_fip.h"
-#include "io_memmap.h"
-#include "debug.h"
 
 /* IO devices */
-static struct io_plat_data io_data;
-static struct io_dev_connector *sh_dev_con;
+static io_plat_data_t io_data;
+static io_dev_connector_t *sh_dev_con;
 static void *const sh_dev_spec;
 static void *const sh_init_params;
 static io_dev_handle sh_dev_handle;
-static struct io_dev_connector *fip_dev_con;
+static io_dev_connector_t *fip_dev_con;
 static void *const fip_dev_spec;
 static io_dev_handle fip_dev_handle;
-static struct io_dev_connector *memmap_dev_con;
+static io_dev_connector_t *memmap_dev_con;
 static void *const memmap_dev_spec;
 static void *const memmap_init_params;
 static io_dev_handle memmap_dev_handle;
 
-static io_block_spec fip_block_spec = {
+static io_block_spec_t fip_block_spec = {
 	.offset = FLASH0_BASE,
 	.length = FLASH0_SIZE
 };
 
-static io_file_spec bl2_file_spec = {
+static io_file_spec_t bl2_file_spec = {
 	.path = BL2_IMAGE_NAME,
 	.mode = FOPEN_MODE_RB
 };
 
-static io_file_spec bl31_file_spec = {
+static io_file_spec_t bl31_file_spec = {
 	.path = BL31_IMAGE_NAME,
 	.mode = FOPEN_MODE_RB
 };
 
-static io_file_spec bl32_file_spec = {
+static io_file_spec_t bl32_file_spec = {
 	.path = BL32_IMAGE_NAME,
 	.mode = FOPEN_MODE_RB
 };
 
-static io_file_spec bl33_file_spec = {
+static io_file_spec_t bl33_file_spec = {
 	.path = BL33_IMAGE_NAME,
 	.mode = FOPEN_MODE_RB
 };
@@ -194,7 +194,7 @@ int plat_get_image_source(const char *image_name, io_dev_handle *dev_handle,
 			if (strcmp(policy->image_name, image_name) == 0) {
 				result = policy->check(policy->image_spec);
 				if (result == IO_SUCCESS) {
-					*(io_file_spec **)image_spec =
+					*(io_file_spec_t **)image_spec =
 						policy->image_spec;
 					*dev_handle = *(policy->dev_handle);
 					break;
@@ -203,7 +203,7 @@ int plat_get_image_source(const char *image_name, io_dev_handle *dev_handle,
 							policy->image_spec);
 					if (result == IO_SUCCESS) {
 						*dev_handle = sh_dev_handle;
-						*(io_file_spec **)image_spec =
+						*(io_file_spec_t **)image_spec =
 							policy->image_spec;
 					}
 				}

plat/fvp/plat_pm.c

@@ -28,20 +28,14 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
 #include <arch_helpers.h>
-#include <console.h>
-#include <platform.h>
-#include <bl_common.h>
-#include <bl31.h>
+#include <assert.h>
 #include <bakery_lock.h>
 #include <cci400.h>
-#include <gic.h>
-#include <fvp_pwrc.h>
-/* Only included for error codes */
+#include <mmio.h>
+#include <platform.h>
 #include <psci.h>
+#include "drivers/pwrc/fvp_pwrc.h"
 
 /*******************************************************************************
  * FVP handler called when an affinity instance is about to enter standby.
@@ -78,7 +72,7 @@ int fvp_affinst_on(unsigned long mpidr,
 {
 	int rc = PSCI_E_SUCCESS;
 	unsigned long linear_id;
-	mailbox *fvp_mboxes;
+	mailbox_t *fvp_mboxes;
 	unsigned int psysr;
 
 	/*
@@ -100,7 +94,7 @@ int fvp_affinst_on(unsigned long mpidr,
 	} while (psysr & PSYSR_AFF_L0);
 
 	linear_id = platform_get_core_pos(mpidr);
-	fvp_mboxes = (mailbox *) (TZDRAM_BASE + MBOX_OFF);
+	fvp_mboxes = (mailbox_t *) (TZDRAM_BASE + MBOX_OFF);
 	fvp_mboxes[linear_id].value = sec_entrypoint;
 	flush_dcache_range((unsigned long) &fvp_mboxes[linear_id],
 			   sizeof(unsigned long));
@@ -209,7 +203,7 @@ int fvp_affinst_suspend(unsigned long mpidr,
 	int rc = PSCI_E_SUCCESS;
 	unsigned int gicc_base, ectlr;
 	unsigned long cpu_setup, cci_setup, linear_id;
-	mailbox *fvp_mboxes;
+	mailbox_t *fvp_mboxes;
 
 	switch (afflvl) {
 	case MPIDR_AFFLVL1:
@@ -247,7 +241,7 @@ int fvp_affinst_suspend(unsigned long mpidr,
 
 			/* Program the jump address for the target cpu */
 			linear_id = platform_get_core_pos(mpidr);
-			fvp_mboxes = (mailbox *) (TZDRAM_BASE + MBOX_OFF);
+			fvp_mboxes = (mailbox_t *) (TZDRAM_BASE + MBOX_OFF);
 			fvp_mboxes[linear_id].value = sec_entrypoint;
 			flush_dcache_range((unsigned long) &fvp_mboxes[linear_id],
 					   sizeof(unsigned long));
@@ -288,7 +282,7 @@ int fvp_affinst_on_finish(unsigned long mpidr,
 {
 	int rc = PSCI_E_SUCCESS;
 	unsigned long linear_id, cpu_setup, cci_setup;
-	mailbox *fvp_mboxes;
+	mailbox_t *fvp_mboxes;
 	unsigned int gicd_base, gicc_base, reg_val, ectlr;
 
 	switch (afflvl) {
@@ -341,7 +335,7 @@ int fvp_affinst_on_finish(unsigned long mpidr,
 		fvp_pwrc_clr_wen(mpidr);
 
 		/* Zero the jump address in the mailbox for this cpu */
-		fvp_mboxes = (mailbox *) (TZDRAM_BASE + MBOX_OFF);
+		fvp_mboxes = (mailbox_t *) (TZDRAM_BASE + MBOX_OFF);
 		linear_id = platform_get_core_pos(mpidr);
 		fvp_mboxes[linear_id].value = 0;
 		flush_dcache_range((unsigned long) &fvp_mboxes[linear_id],
@@ -394,7 +388,7 @@ int fvp_affinst_suspend_finish(unsigned long mpidr,
 /*******************************************************************************
  * Export the platform handlers to enable psci to invoke them
  ******************************************************************************/
-static plat_pm_ops fvp_plat_pm_ops = {
+static plat_pm_ops_t fvp_plat_pm_ops = {
 	fvp_affinst_standby,
 	fvp_affinst_on,
 	fvp_affinst_off,
@@ -406,7 +400,7 @@ static plat_pm_ops fvp_plat_pm_ops = {
 /*******************************************************************************
  * Export the platform specific power ops & initialize the fvp power controller
  ******************************************************************************/
-int platform_setup_pm(plat_pm_ops **plat_ops)
+int platform_setup_pm(plat_pm_ops_t **plat_ops)
 {
 	*plat_ops = &fvp_plat_pm_ops;
 	return 0;

plat/fvp/plat_security.c

@@ -29,9 +29,9 @@
  */
 
 #include <assert.h>
-#include "platform.h"
-#include "tzc400.h"
-#include "debug.h"
+#include <platform.h>
+#include <tzc400.h>
+#include <debug.h>
 
 /* Used to improve readability for configuring regions. */
 #define FILTER_SHIFT(filter)	(1 << filter)
@@ -44,7 +44,7 @@
  */
 void plat_security_setup(void)
 {
-	struct tzc_instance controller;
+	tzc_instance_t controller;
 
 	/*
 	 * The Base FVP has a TrustZone address space controller, the Foundation

plat/fvp/plat_topology.c

@@ -28,12 +28,11 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <string.h>
 #include <assert.h>
 #include <platform.h>
-#include <fvp_pwrc.h>
 /* TODO: Reusing psci error codes & state information. Get our own! */
 #include <psci.h>
+#include "drivers/pwrc/fvp_pwrc.h"
 
 /* We treat '255' as an invalid affinity instance */
 #define AFFINST_INVAL	0xff
@@ -46,20 +45,20 @@
  * marks the absent affinity level instances as PSCI_AFF_ABSENT e.g. there is no
  * cluster 1 on the Foundation FVP. The 'data' field is currently unused.
  ******************************************************************************/
-typedef struct {
+typedef struct affinity_info {
 	unsigned char sibling;
 	unsigned char child;
 	unsigned char state;
 	unsigned int data;
-} affinity_info;
+} affinity_info_t;
 
 /*******************************************************************************
  * The following two data structures store the topology tree for the fvp. There
  * is a separate array for each affinity level i.e. cpus and clusters. The child
  * and sibling references allow traversal inside and in between the two arrays.
  ******************************************************************************/
-static affinity_info fvp_aff1_topology_map[PLATFORM_CLUSTER_COUNT];
-static affinity_info fvp_aff0_topology_map[PLATFORM_CORE_COUNT];
+static affinity_info_t fvp_aff1_topology_map[PLATFORM_CLUSTER_COUNT];
+static affinity_info_t fvp_aff0_topology_map[PLATFORM_CORE_COUNT];
 
 /* Simple global variable to safeguard us from stupidity */
 static unsigned int topology_setup_done;

plat/fvp/platform.h

@@ -32,10 +32,6 @@
 #define __PLATFORM_H__
 
 #include <arch.h>
-#include <mmio.h>
-#include <psci.h>
-#include <bl_common.h>
-#include "io_storage.h"
 
 
 /*******************************************************************************
@@ -340,10 +336,20 @@
 
 #ifndef __ASSEMBLY__
 
-typedef volatile struct {
+#include <stdint.h>
+
+
+typedef volatile struct mailbox {
 	unsigned long value
 	__attribute__((__aligned__(CACHE_WRITEBACK_GRANULE)));
-} mailbox;
+} mailbox_t;
+
+/*******************************************************************************
+ * Forward declarations
+ ******************************************************************************/
+struct plat_pm_ops;
+struct meminfo;
+struct io_dev_info;
 
 /*******************************************************************************
  * Function and variable prototypes
@@ -364,11 +370,11 @@ extern unsigned long warm_boot_entrypoint;
 extern void bl1_plat_arch_setup(void);
 extern void bl2_plat_arch_setup(void);
 extern void bl31_plat_arch_setup(void);
-extern int platform_setup_pm(plat_pm_ops **);
+extern int platform_setup_pm(struct plat_pm_ops **);
 extern unsigned int platform_get_core_pos(unsigned long mpidr);
 extern void disable_mmu(void);
 extern void enable_mmu(void);
-extern void configure_mmu(meminfo *,
+extern void configure_mmu(struct meminfo *,
 			  unsigned long,
 			  unsigned long,
 			  unsigned long,
@@ -395,7 +401,7 @@ extern unsigned int plat_get_aff_state(unsigned int, unsigned long);
 /* Declarations for plat_io_storage.c */
 extern void io_setup(void);
 extern int plat_get_image_source(const char *image_name,
-		io_dev_handle *dev_handle, void **image_spec);
+		struct io_dev_info **dev_handle, void **image_spec);
 
 /* Declarations for plat_security.c */
 extern void plat_security_setup(void);

plat/fvp/platform.mk

@@ -28,74 +28,45 @@
 # POSSIBILITY OF SUCH DAMAGE.
 #
 
-PLAT_INCLUDES		:=	-Idrivers/arm/interconnect/cci-400	\
-				-Idrivers/arm/interconnect/tzc-400	\
-				-Idrivers/console			\
-				-Idrivers/arm/peripherals/pl011		\
-				-Idrivers/power
-
-PLAT_BL1_C_VPATH	:=	drivers/arm/interconnect/cci-400	\
-				drivers/arm/peripherals/pl011		\
-				lib/arch/${ARCH}			\
-				lib/semihosting				\
-				lib/stdlib				\
-				drivers/io
-
-PLAT_BL1_S_VPATH	:=	lib/semihosting/${ARCH}
-
-PLAT_BL2_C_VPATH	:=	drivers/arm/interconnect/cci-400	\
-				drivers/arm/interconnect/tzc-400	\
-				drivers/arm/peripherals/pl011		\
-				lib/arch/${ARCH}			\
-				lib/stdlib				\
-				lib/semihosting				\
-				drivers/io
-
-PLAT_BL2_S_VPATH	:=	lib/semihosting/${ARCH}
-
-PLAT_BL31_C_VPATH	:=	drivers/arm/interconnect/cci-400	\
-				drivers/arm/peripherals/pl011		\
-				lib/arch/${ARCH}			\
-				lib/semihosting				\
-				lib/stdlib				\
-				drivers/power				\
-				drivers/io
-
-PLAT_BL31_S_VPATH	:=	lib/semihosting/${ARCH}
+#
+# No additional platform system include directories required
+#
+# PLAT_INCLUDES		:=
 
-PLAT_BL_COMMON_SOURCES	:=	semihosting_call.S			\
-				mmio.c					\
-				pl011_console.c				\
-				pl011.c					\
-				semihosting.c				\
-				sysreg_helpers.S			\
-				plat_io_storage.c			\
-				io_semihosting.c			\
-				io_fip.c				\
-				io_memmap.c				\
-				xlat_tables.c
+PLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/pl011.c			\
+				drivers/arm/pl011/pl011_console.c		\
+				drivers/io/io_fip.c				\
+				drivers/io/io_memmap.c				\
+				drivers/io/io_semihosting.c			\
+				lib/mmio.c					\
+				lib/aarch64/sysreg_helpers.S		\
+				lib/aarch64/xlat_tables.c			\
+				lib/semihosting/semihosting.c			\
+				lib/semihosting/aarch64/semihosting_call.S	\
+				plat/fvp/plat_io_storage.c
 
-BL1_SOURCES		+=	bl1_plat_setup.c			\
-				bl1_plat_helpers.S			\
-				plat_helpers.S				\
-				platform_up_stack.S			\
-				plat_common.c				\
-				cci400.c
+BL1_SOURCES		+=	drivers/arm/cci400/cci400.c			\
+				plat/common/aarch64/platform_up_stack.S		\
+				plat/fvp/bl1_plat_setup.c			\
+				plat/fvp/aarch64/bl1_plat_helpers.S		\
+				plat/fvp/aarch64/plat_common.c			\
+				plat/fvp/aarch64/plat_helpers.S
 
-BL2_SOURCES		+=	bl2_plat_setup.c			\
-				platform_up_stack.S			\
-				plat_common.c				\
-				plat_security.c				\
-				tzc400.c
+BL2_SOURCES		+=	drivers/arm/tzc400/tzc400.c			\
+				plat/common/aarch64/platform_up_stack.S		\
+				plat/fvp/bl2_plat_setup.c			\
+				plat/fvp/plat_security.c			\
+				plat/fvp/aarch64/plat_common.c
 
-BL31_SOURCES		+=	bl31_plat_setup.c			\
-				plat_helpers.S				\
-				platform_mp_stack.S			\
-				plat_common.c				\
-				plat_pm.c				\
-				plat_topology.c				\
-				plat_gic.c				\
-				fvp_pwrc.c				\
-				cci400.c				\
-				gic_v2.c				\
-				gic_v3.c
+BL31_SOURCES		+=	drivers/arm/gic/gic_v2.c			\
+				drivers/arm/gic/gic_v3.c			\
+				drivers/arm/gic/aarch64/gic_v3_sysregs.S	\
+				drivers/arm/cci400/cci400.c			\
+				plat/common/aarch64/platform_mp_stack.S		\
+				plat/fvp/bl31_plat_setup.c			\
+				plat/fvp/plat_gic.c				\
+				plat/fvp/plat_pm.c				\
+				plat/fvp/plat_topology.c			\
+				plat/fvp/aarch64/plat_helpers.S			\
+				plat/fvp/aarch64/plat_common.c			\
+				plat/fvp/drivers/pwrc/fvp_pwrc.c