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Unverified Commit 41e48fed authored by Dimitris Papastamos's avatar Dimitris Papastamos Committed by GitHub
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Merge pull request #1393 from geesun/correct_comment 

Correct some typo errors in comment
parents 29e5c717 79c17995
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include/common/aarch64/el3_common_macros.S
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...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
* *
* SCTLR_EL3.I: Enable the instruction cache. * SCTLR_EL3.I: Enable the instruction cache.
* *
* SCTLR_EL3.SA: Enable Stack Aligment check. A SP alignment fault * SCTLR_EL3.SA: Enable Stack Alignment check. A SP alignment fault
* exception is generated if a load or store instruction executed at * exception is generated if a load or store instruction executed at
* EL3 uses the SP as the base address and the SP is not aligned to a * EL3 uses the SP as the base address and the SP is not aligned to a
* 16-byte boundary. * 16-byte boundary.
...@@ -186,7 +186,7 @@ ...@@ -186,7 +186,7 @@
* XN (Execute-never). Set to zero so that this control has no * XN (Execute-never). Set to zero so that this control has no
* effect on memory access permissions. * effect on memory access permissions.
* *
* SCTLR_EL3.SA: Set to zero to disable Stack Aligment check. * SCTLR_EL3.SA: Set to zero to disable Stack Alignment check.
* *
* SCTLR_EL3.A: Set to zero to disable Alignment fault checking. * SCTLR_EL3.A: Set to zero to disable Alignment fault checking.
* ------------------------------------------------------------- * -------------------------------------------------------------
......
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