Skip to content

GitLab

Commit 444281cc authored by Lin Ma's avatar Lin Ma
Browse files

Address issue 156: 64-bit addresses get truncated 

Addresses were declared as "unsigned int" in drivers/arm/peripherals/pl011/pl011.h and in function init_xlation_table. Changed to use "unsigned long" instead
Fixes ARM-software/tf-issues#156
parent c5c9b69c
Hide whitespace changes
Inline Side-by-side
include/drivers/arm/pl011.h
View file @ 444281cc
...@@ -107,32 +107,32 @@ ...@@ -107,32 +107,32 @@
* Pl011 CPU interface accessors for writing registers * Pl011 CPU interface accessors for writing registers
******************************************************************************/ ******************************************************************************/
static inline void pl011_write_ibrd(unsigned int base, unsigned int val) static inline void pl011_write_ibrd(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTIBRD, val); mmio_write_32(base + UARTIBRD, val);
} }
static inline void pl011_write_fbrd(unsigned int base, unsigned int val) static inline void pl011_write_fbrd(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTFBRD, val); mmio_write_32(base + UARTFBRD, val);
} }
static inline void pl011_write_lcr_h(unsigned int base, unsigned int val) static inline void pl011_write_lcr_h(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTLCR_H, val); mmio_write_32(base + UARTLCR_H, val);
} }
static inline void pl011_write_ecr(unsigned int base, unsigned int val) static inline void pl011_write_ecr(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTECR, val); mmio_write_32(base + UARTECR, val);
} }
static inline void pl011_write_cr(unsigned int base, unsigned int val) static inline void pl011_write_cr(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTCR, val); mmio_write_32(base + UARTCR, val);
} }
static inline void pl011_write_dr(unsigned int base, unsigned int val) static inline void pl011_write_dr(unsigned long base, unsigned int val)
{ {
mmio_write_32(base + UARTDR, val); mmio_write_32(base + UARTDR, val);
} }
...@@ -141,12 +141,12 @@ static inline void pl011_write_dr(unsigned int base, unsigned int val) ...@@ -141,12 +141,12 @@ static inline void pl011_write_dr(unsigned int base, unsigned int val)
* Pl011 CPU interface accessors for reading registers * Pl011 CPU interface accessors for reading registers
******************************************************************************/ ******************************************************************************/
static inline unsigned int pl011_read_fr(unsigned int base) static inline unsigned int pl011_read_fr(unsigned long base)
{ {
return mmio_read_32(base + UARTFR); return mmio_read_32(base + UARTFR);
} }
static inline unsigned int pl011_read_dr(unsigned int base) static inline unsigned int pl011_read_dr(unsigned long base)
{ {
return mmio_read_32(base + UARTDR); return mmio_read_32(base + UARTDR);
} }
......
lib/aarch64/xlat_tables.c
View file @ 444281cc
...@@ -173,7 +173,7 @@ static mmap_region_t *init_xlation_table(mmap_region_t *mm, unsigned long base, ...@@ -173,7 +173,7 @@ static mmap_region_t *init_xlation_table(mmap_region_t *mm, unsigned long base,
unsigned level_size_shift = L1_XLAT_ADDRESS_SHIFT - (level - 1) * unsigned level_size_shift = L1_XLAT_ADDRESS_SHIFT - (level - 1) *
XLAT_TABLE_ENTRIES_SHIFT; XLAT_TABLE_ENTRIES_SHIFT;
unsigned level_size = 1 << level_size_shift; unsigned level_size = 1 << level_size_shift;
unsigned level_index_mask = XLAT_TABLE_ENTRIES_MASK << level_size_shift; unsigned long level_index_mask = XLAT_TABLE_ENTRIES_MASK << level_size_shift;
assert(level <= 3); assert(level <= 3);
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment