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Commit 44f4bb24 authored by Paul Beesley's avatar Paul Beesley Committed by TrustedFirmware Code Review
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Merge "rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h" into integration

parents bfc0c079 7c103d60
master v2.5 v2.5-rc1 v2.5-rc0 v2.4 v2.4-rc2 v2.4-rc1 v2.4-rc0 v2.3 v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.2 v2.2-rc2 v2.2-rc1 v2.2-rc0 arm_cca_v0.2 arm_cca_v0.1
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with 21 additions and 59 deletions
+21 -59
drivers/renesas/rcar/pfc/pfc_init.c
View file @ 44f4bb24
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -37,20 +37,6 @@
#include "D3/pfc_init_d3.h"
#endif
/* Product Register */
#define PRR (0xFFF00044U)
#define PRR_PRODUCT_MASK (0x00007F00U)
#define PRR_CUT_MASK (0x000000FFU)
#define PRR_PRODUCT_H3 (0x00004F00U) /* R-Car H3 */
#define PRR_PRODUCT_M3 (0x00005200U) /* R-Car M3 */
#define PRR_PRODUCT_V3M (0x00005400U) /* R-Car V3M */
#define PRR_PRODUCT_M3N (0x00005500U) /* R-Car M3N */
#define PRR_PRODUCT_E3 (0x00005700U) /* R-Car E3 */
#define PRR_PRODUCT_D3 (0x00005800U) /* R-Car D3 */
#define PRR_PRODUCT_10 (0x00U)
#define PRR_PRODUCT_11 (0x01U)
#define PRR_PRODUCT_20 (0x10U)
#define PRR_PRODUCT_ERR(reg) \
do { \
ERROR("LSI Product ID(PRR=0x%x) PFC initialize not supported.\n", \
......
drivers/renesas/rcar/pfc/pfc_regs.h
View file @ 44f4bb24
......@@ -115,7 +115,6 @@
#define GPIO_IOINTSEL6 (GPIO_BASE + 0x5400U)
#define GPIO_INOUTSEL6 (GPIO_BASE + 0x5404U)
#define GPIO_OUTDT6 (GPIO_BASE + 0x5408U)
#define GPIO_INDT6 (GPIO_BASE + 0x540CU)
#define GPIO_INTDT6 (GPIO_BASE + 0x5410U)
#define GPIO_INTCLR6 (GPIO_BASE + 0x5414U)
#define GPIO_INTMSK6 (GPIO_BASE + 0x5418U)
......
drivers/renesas/rcar/qos/qos_init.c
View file @ 44f4bb24
......@@ -12,6 +12,7 @@
#include "qos_init.h"
#include "qos_common.h"
#include "qos_reg.h"
#include "rcar_def.h"
#if RCAR_LSI == RCAR_AUTO
#include "H3/qos_init_h3_v10.h"
#include "H3/qos_init_h3_v11.h"
......@@ -50,22 +51,6 @@
#include "D3/qos_init_d3.h"
#endif
/* Product Register */
#define PRR 0xFFF00044U
#define PRR_PRODUCT_MASK 0x00007F00U
#define PRR_CUT_MASK 0x000000FFU
#define PRR_PRODUCT_H3 0x00004F00U /* R-Car H3 */
#define PRR_PRODUCT_M3 0x00005200U /* R-Car M3 */
#define PRR_PRODUCT_V3M 0x00005400U /* R-Car V3M */
#define PRR_PRODUCT_M3N 0x00005500U /* R-Car M3N */
#define PRR_PRODUCT_E3 0x00005700U /* R-Car E3 */
#define PRR_PRODUCT_D3 0x00005800U /* R-Car D3 */
#define PRR_PRODUCT_10 0x00U
#define PRR_PRODUCT_11 0x01U
#define PRR_PRODUCT_20 0x10U
#define PRR_PRODUCT_21 0x11U
#define PRR_PRODUCT_30 0x20U
#if (RCAR_LSI != RCAR_E3) && (RCAR_LSI != RCAR_D3) && (RCAR_LSI != RCAR_V3M)
#define DRAM_CH_CNT 0x04
......
drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c
View file @ 44f4bb24
......@@ -20,6 +20,7 @@
#include "boot_init_dram.h"
#include "dram_sub_func.h"
#include "micro_delay.h"
#include "rcar_def.h"
#define DDR_BACKUPMODE
#define FATAL_MSG(x) NOTICE(x)
......
drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c
View file @ 44f4bb24
......@@ -1622,7 +1622,6 @@ static const uint32_t TermcodeBySample[20][3] = {
#define PFC_PUD5 0xE6060454U
#define PFC_PUD6 0xE6060458U
#define GPIO_INDT5 0xE605500CU
#define GPIO_INDT6 0xE605540CU
#define GPIO_GPSR6 0xE6060118U
#if (RCAR_GEN3_ULCB == 0)
......
drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h
View file @ 44f4bb24
......@@ -55,19 +55,6 @@
#define LIFEC_CHIPID(x) (0xE6110040U + 0x04U * (x))
/* Product Register */
#define PRR (0xFFF00044U)
#define PRR_PRODUCT_MASK (0x00007F00U)
#define PRR_CUT_MASK (0x000000FFU)
#define PRR_PRODUCT_H3 (0x00004F00U) /* R-Car H3 */
#define PRR_PRODUCT_M3 (0x00005200U) /* R-Car M3-W */
#define PRR_PRODUCT_M3N (0x00005500U) /* R-Car M3-N */
#define PRR_PRODUCT_V3H (0x00005600U) /* R-Car V3H */
#define PRR_PRODUCT_10 (0x00U) /* Ver.1.0 */
#define PRR_PRODUCT_11 (0x01U) /* Ver.1.1 */
#define PRR_PRODUCT_20 (0x10U) /* Ver.2.0 */
#define PRR_PRODUCT_30 (0x20U) /* Ver.3.0 */
/* DBSC registers */
#define DBSC_DBSYSCONF1 0xE6790004U
#define DBSC_DBPHYCONF0 0xE6790010U
......
drivers/staging/renesas/rcar/ddr/dram_sub_func.c
View file @ 44f4bb24
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -8,15 +8,7 @@
#include <lib/mmio.h>
#include "dram_sub_func.h"
#define PRR (0xFFF00044U)
#define PRR_PRODUCT_MASK (0x00007F00U)
#define PRR_CUT_MASK (0x000000FFU)
#define PRR_PRODUCT_H3 (0x00004F00U) /* R-Car H3 */
#define PRR_PRODUCT_M3 (0x00005200U) /* R-Car M3 */
#define PRR_PRODUCT_M3N (0x00005500U) /* R-Car M3N */
#define PRR_PRODUCT_E3 (0x00005700U) /* R-Car E3 */
#define PRR_PRODUCT_V3H (0x00005600U) /* R-Car V3H */
#include "rcar_def.h"
#if RCAR_SYSTEM_SUSPEND
/* Local defines */
......@@ -32,11 +24,9 @@
#endif
#define GPIO_OUTDT1 (0xE6051008U)
#define GPIO_INDT1 (0xE605100CU)
#define GPIO_OUTDT3 (0xE6053008U)
#define GPIO_INDT3 (0xE605300CU)
#define GPIO_OUTDT6 (0xE6055408U)
#define GPIO_INDT6 (0xE605540CU)
#if DRAM_BACKUP_GPIO_USE == 1
#define GPIO_BKUP_REQB_SHIFT_SALVATOR (9U) /* GP1_9 (BKUP_REQB) */
......
plat/renesas/rcar/include/rcar_def.h
View file @ 44f4bb24
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -172,6 +172,21 @@
#define RCAR_PRODUCT_H3_CUT20 (RCAR_PRODUCT_H3 | U(0x10)) /* 2.0 */
#define RCAR_PRODUCT_M3_CUT10 (RCAR_PRODUCT_M3 | U(0x00)) /* 1.0 */
#define RCAR_PRODUCT_M3_CUT11 (RCAR_PRODUCT_M3 | U(0x10))
#define PRR 0xFFF00044U
#define PRR_PRODUCT_MASK 0x00007F00U
#define PRR_CUT_MASK 0x000000FFU
#define PRR_PRODUCT_H3 0x00004F00U /* R-Car H3 */
#define PRR_PRODUCT_M3 0x00005200U /* R-Car M3-W */
#define PRR_PRODUCT_V3M 0x00005400U /* R-Car V3M */
#define PRR_PRODUCT_M3N 0x00005500U /* R-Car M3-N */
#define PRR_PRODUCT_V3H 0x00005600U /* R-Car V3H */
#define PRR_PRODUCT_E3 0x00005700U /* R-Car E3 */
#define PRR_PRODUCT_D3 0x00005800U /* R-Car D3 */
#define PRR_PRODUCT_10 0x00U /* Ver.1.0 */
#define PRR_PRODUCT_11 0x01U /* Ver.1.1 */
#define PRR_PRODUCT_20 0x10U /* Ver.2.0 */
#define PRR_PRODUCT_21 0x11U /* Ver.2.1 */
#define PRR_PRODUCT_30 0x20U /* Ver.3.0 */
#define RCAR_CPU_MASK_CA57 U(0x80000000)
#define RCAR_CPU_MASK_CA53 U(0x04000000)
#define RCAR_CPU_HAVE_CA57 U(0x00000000)
......
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