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Commit 4811168a authored by Joanna Farley's avatar Joanna Farley Committed by TrustedFirmware Code Review
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Merge "Plat AXG: Fix PLAT_MAX_PWR_LVL value" into integration

parents a31de1e8 47f2445a
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plat/amlogic/axg/include/platform_def.h
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/* /*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
#define AML_PRIMARY_CPU U(0) #define AML_PRIMARY_CPU U(0)
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
PLATFORM_CORE_COUNT) PLATFORM_CORE_COUNT)
......
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