Commit 4983f8b6 authored by Yoshifumi Hosoya's avatar Yoshifumi Hosoya Committed by Marek Vasut
Browse files

rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh mode



Very rarely, LPDDR4 power consumption may not decrease
In self-refresh mode.

This patch fixes the DBSC4 self-refresh mode sequence.
Signed-off-by: default avatarYoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: default avatarKenji Miyazawa <kenji.miyazawa.xt@renesas.com>
Signed-off-by: default avatarChiaki Fujii <chiaki.fujii.wj@renesas.com>
Change-Id: I838fa0892b1caf1ecd3f04538b3427e7d971ef59
parent 285b6cfe
...@@ -50,6 +50,7 @@ RCAR_INSTANTIATE_LOCK ...@@ -50,6 +50,7 @@ RCAR_INSTANTIATE_LOCK
#define DBSC4_REG_DBRFEN (DBSC4_REG_BASE + 0x0204U) #define DBSC4_REG_DBRFEN (DBSC4_REG_BASE + 0x0204U)
#define DBSC4_REG_DBWAIT (DBSC4_REG_BASE + 0x0210U) #define DBSC4_REG_DBWAIT (DBSC4_REG_BASE + 0x0210U)
#define DBSC4_REG_DBCALCNF (DBSC4_REG_BASE + 0x0424U) #define DBSC4_REG_DBCALCNF (DBSC4_REG_BASE + 0x0424U)
#define DBSC4_REG_DBDFIPMSTRCNF (DBSC4_REG_BASE + 0x0520U)
#define DBSC4_REG_DBPDLK0 (DBSC4_REG_BASE + 0x0620U) #define DBSC4_REG_DBPDLK0 (DBSC4_REG_BASE + 0x0620U)
#define DBSC4_REG_DBPDRGA0 (DBSC4_REG_BASE + 0x0624U) #define DBSC4_REG_DBPDRGA0 (DBSC4_REG_BASE + 0x0624U)
#define DBSC4_REG_DBPDRGD0 (DBSC4_REG_BASE + 0x0628U) #define DBSC4_REG_DBPDRGD0 (DBSC4_REG_BASE + 0x0628U)
...@@ -61,6 +62,7 @@ RCAR_INSTANTIATE_LOCK ...@@ -61,6 +62,7 @@ RCAR_INSTANTIATE_LOCK
#define DBSC4_BIT_DBACEN_ACCEN ((uint32_t)(1U << 0)) #define DBSC4_BIT_DBACEN_ACCEN ((uint32_t)(1U << 0))
#define DBSC4_BIT_DBRFEN_ARFEN ((uint32_t)(1U << 0)) #define DBSC4_BIT_DBRFEN_ARFEN ((uint32_t)(1U << 0))
#define DBSC4_BIT_DBCAMxSTAT0 (0x00000001U) #define DBSC4_BIT_DBCAMxSTAT0 (0x00000001U)
#define DBSC4_BIT_DBDFIPMSTRCNF_PMSTREN (0x00000001U)
#define DBSC4_SET_DBCMD_OPC_PRE (0x04000000U) #define DBSC4_SET_DBCMD_OPC_PRE (0x04000000U)
#define DBSC4_SET_DBCMD_OPC_SR (0x0A000000U) #define DBSC4_SET_DBCMD_OPC_SR (0x0A000000U)
#define DBSC4_SET_DBCMD_OPC_PD (0x08000000U) #define DBSC4_SET_DBCMD_OPC_PD (0x08000000U)
...@@ -393,6 +395,11 @@ static void __attribute__ ((section(".system_ram"))) ...@@ -393,6 +395,11 @@ static void __attribute__ ((section(".system_ram")))
self_refresh: self_refresh:
/* DFI_PHYMSTR_ACK setting */
mmio_write_32(DBSC4_REG_DBDFIPMSTRCNF,
mmio_read_32(DBSC4_REG_DBDFIPMSTRCNF) &
(~DBSC4_BIT_DBDFIPMSTRCNF_PMSTREN));
/* Set the Self-Refresh mode */ /* Set the Self-Refresh mode */
mmio_write_32(DBSC4_REG_DBACEN, 0); mmio_write_32(DBSC4_REG_DBACEN, 0);
......
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