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adam.huang
Arm Trusted Firmware
Commits
52eb3229
Commit
52eb3229
authored
3 years ago
by
Madhukar Pappireddy
Committed by
TrustedFirmware Code Review
3 years ago
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Merge "fix(mediatek/mt8192/spm): add missing bit define for debug purpose" into integration
parents
61b5243d
310c3a26
master
No related merge requests found
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plat/mediatek/mt8192/drivers/spm/mt_spm_cond.c
+5
-0
plat/mediatek/mt8192/drivers/spm/mt_spm_cond.c
plat/mediatek/mt8192/drivers/spm/mt_spm_cond.h
+5
-14
plat/mediatek/mt8192/drivers/spm/mt_spm_cond.h
with
10 additions
and
14 deletions
+10
-14
plat/mediatek/mt8192/drivers/spm/mt_spm_cond.c
View file @
52eb3229
...
...
@@ -143,6 +143,11 @@ unsigned int mt_spm_cond_check(int state_id,
blocked
|=
SPM_COND_CHECK_BLOCKED_PLL
;
}
if
(
is_system_suspend
&&
(
blocked
!=
0U
))
{
INFO
(
"suspend: %s total blocked = 0x%08x
\n
"
,
dest
->
name
,
blocked
);
}
return
blocked
;
}
...
...
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plat/mediatek/mt8192/drivers/spm/mt_spm_cond.h
View file @
52eb3229
...
...
@@ -23,20 +23,11 @@ enum PLAT_SPM_COND {
PLAT_SPM_COND_MAX
,
};
enum
PLAT_SPM_COND_PLL
{
PLAT_SPM_COND_PLL_UNIVPLL
=
0
,
PLAT_SPM_COND_PLL_MFGPLL
,
PLAT_SPM_COND_PLL_MSDCPLL
,
PLAT_SPM_COND_PLL_TVDPLL
,
PLAT_SPM_COND_PLL_MMPLL
,
PLAT_SPM_COND_PLL_MAX
,
};
#define PLL_BIT_MFGPLL (PLAT_SPM_COND_PLL_MFGPLL)
#define PLL_BIT_MMPLL (PLAT_SPM_COND_PLL_MMPLL)
#define PLL_BIT_UNIVPLL (PLAT_SPM_COND_PLL_UNIVPLL)
#define PLL_BIT_MSDCPLL (PLAT_SPM_COND_PLL_MSDCPLL)
#define PLL_BIT_TVDPLL (PLAT_SPM_COND_PLL_TVDPLL)
#define PLL_BIT_UNIVPLL BIT(0)
#define PLL_BIT_MFGPLL BIT(1)
#define PLL_BIT_MSDCPLL BIT(2)
#define PLL_BIT_TVDPLL BIT(3)
#define PLL_BIT_MMPLL BIT(4)
/* Definition about SPM_COND_CHECK_BLOCKED
* bit [00 ~ 15]: cg blocking index
...
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