plat: marvell: a70x0: reconfigure CP0 PCIE2 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)

For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.

Change-Id: I80b00691ae8d0a3f3f7285b8e0bfc21c0a095e94
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

plat/marvell/a8k/a70x0/board/marvell_plat_config.c

@@ -76,6 +76,8 @@ struct addr_map_win iob_memory_map[] = {
 	{0x00000000f7000000,	0x1000000,	PEX1_TID},
 	/* PEX2_X1 window */
 	{0x00000000f8000000,	0x1000000,	PEX2_TID},
+	{0x00000000c0000000,	0x30000000,	PEX2_TID},
+	{0x0000000800000000,	0x100000000,	PEX2_TID},
 	/* PEX0_X4 window */
 	{0x00000000f6000000,	0x1000000,	PEX0_TID},
 	/* SPI1_CS0 (RUNIT) window */
@@ -101,6 +103,8 @@ struct addr_map_win ccu_memory_map[] = {	/* IO window */
 	{0x00000000f2000000,	0x4000000,	IO_0_TID}, /* IO window */
 #else
 	{0x00000000f2000000,	0xe000000,	IO_0_TID},
+	{0x00000000c0000000,	0x30000000,	IO_0_TID}, /* IO window */
+	{0x0000000800000000,	0x100000000,	IO_0_TID}, /* IO window */
 #endif
 };