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Unverified Commit 63b9b542 authored by Antonio Niño Díaz's avatar Antonio Niño Díaz Committed by GitHub
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Merge pull request #1744 from jollysxilinx/integration 

plat: xilinx: code restructure
parents 34efb683 65c80d60
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plat/xilinx/zynqmp/pm_service/pm_client.h
View file @ 63b9b542
......@@ -21,6 +21,7 @@ void pm_client_abort_suspend(void);
void pm_client_wakeup(const struct pm_proc *proc);
enum pm_ret_status set_ocm_retention(void);
enum pm_ret_status pm_set_suspend_mode(uint32_t mode);
const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid);
/* Global variables to be set in pm_client.c */
extern const struct pm_proc *primary_proc;
......
plat/xilinx/zynqmp/pm_service/pm_svc_main.c
View file @ 63b9b542
......@@ -20,7 +20,7 @@
#include <plat/common/platform.h>
#endif
#include "../zynqmp_private.h"
#include <plat_private.h>
#include "pm_api_sys.h"
#include "pm_client.h"
#include "pm_ipi.h"
......
plat/xilinx/zynqmp/sip_svc_setup.c
View file @ 63b9b542
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -9,9 +9,9 @@
#include <common/runtime_svc.h>
#include <tools_share/uuid.h>
#include <plat_ipi.h>
#include "ipi_mailbox_svc.h"
#include "pm_svc_main.h"
#include "zynqmp_ipi.h"
/* SMC function IDs for SiP Service queries */
#define ZYNQMP_SIP_SVC_CALL_COUNT 0x8200ff00
......@@ -41,6 +41,9 @@ DEFINE_SVC_UUID2(zynqmp_sip_uuid,
*/
static int32_t sip_svc_setup(void)
{
/* Configure IPI data for ZynqMP */
zynqmp_ipi_config_table_init();
/* PM implementation as SiP Service */
pm_setup();
......
plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
View file @ 63b9b542
......@@ -9,9 +9,9 @@
#include <drivers/console.h>
#include <plat_arm.h>
#include <plat_private.h>
#include <platform_tsp.h>
#include "../zynqmp_private.h"
#define BL32_END (unsigned long)(&__BL32_END__)
......
plat/xilinx/zynqmp/zynqmp_ipi.c
View file @ 63b9b542
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -16,48 +16,12 @@
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
#include "zynqmp_ipi.h"
#include "../zynqmp_private.h"
/*********************************************************************
* Macros definitions
********************************************************************/
/* IPI registers base address */
#define IPI_REGS_BASE 0xFF300000U
/* IPI registers offsets macros */
#define IPI_TRIG_OFFSET 0x00U
#define IPI_OBR_OFFSET 0x04U
#define IPI_ISR_OFFSET 0x10U
#define IPI_IMR_OFFSET 0x14U
#define IPI_IER_OFFSET 0x18U
#define IPI_IDR_OFFSET 0x1CU
/* IPI register start offset */
#define IPI_REG_BASE(I) (zynqmp_ipi_table[(I)].ipi_reg_base)
/* IPI register bit mask */
#define IPI_BIT_MASK(I) (zynqmp_ipi_table[(I)].ipi_bit_mask)
/* IPI secure check */
#define IPI_SECURE_MASK 0x1U
#define IPI_IS_SECURE(I) ((zynqmp_ipi_table[(I)].secure_only & \
IPI_SECURE_MASK) ? 1 : 0)
/*********************************************************************
* Struct definitions
********************************************************************/
/* structure to maintain IPI configuration information */
struct zynqmp_ipi_config {
unsigned int ipi_bit_mask;
unsigned int ipi_reg_base;
unsigned char secure_only;
};
#include <ipi.h>
#include <plat_ipi.h>
#include <plat_private.h>
/* Zynqmp ipi configuration table */
const static struct zynqmp_ipi_config zynqmp_ipi_table[] = {
const static struct ipi_config zynqmp_ipi_table[] = {
/* APU IPI */
{
.ipi_bit_mask = 0x1,
......@@ -126,160 +90,11 @@ const static struct zynqmp_ipi_config zynqmp_ipi_table[] = {
},
};
/* is_ipi_mb_within_range() - verify if IPI mailbox is within range
*
* @local - local IPI ID
* @remote - remote IPI ID
*
* return - 1 if within range, 0 if not
*/
static inline int is_ipi_mb_within_range(uint32_t local, uint32_t remote)
{
int ret = 1;
uint32_t ipi_total = ARRAY_SIZE(zynqmp_ipi_table);
if (remote >= ipi_total || local >= ipi_total)
ret = 0;
return ret;
}
/**
* ipi_mb_validate() - validate IPI mailbox access
*
* @local - local IPI ID
* @remote - remote IPI ID
* @is_secure - indicate if the requester is from secure software
*
* return - 0 success, negative value for errors
*/
int ipi_mb_validate(uint32_t local, uint32_t remote, unsigned int is_secure)
{
int ret = 0;
if (!is_ipi_mb_within_range(local, remote))
ret = -EINVAL;
else if (IPI_IS_SECURE(local) && !is_secure)
ret = -EPERM;
else if (IPI_IS_SECURE(remote) && !is_secure)
ret = -EPERM;
return ret;
}
/**
* ipi_mb_open() - Open IPI mailbox.
*
* @local - local IPI ID
* @remote - remote IPI ID
*
*/
void ipi_mb_open(uint32_t local, uint32_t remote)
{
mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
IPI_BIT_MASK(remote));
mmio_write_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET,
IPI_BIT_MASK(remote));
}
/**
* ipi_mb_release() - Open IPI mailbox.
*
* @local - local IPI ID
* @remote - remote IPI ID
*
*/
void ipi_mb_release(uint32_t local, uint32_t remote)
{
mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
IPI_BIT_MASK(remote));
}
/**
* ipi_mb_enquire_status() - Enquire IPI mailbox status
*
* @local - local IPI ID
* @remote - remote IPI ID
*
* return - 0 idle, positive value for pending sending or receiving,
* negative value for errors
*/
int ipi_mb_enquire_status(uint32_t local, uint32_t remote)
{
int ret = 0;
uint32_t status;
status = mmio_read_32(IPI_REG_BASE(local) + IPI_OBR_OFFSET);
if (status & IPI_BIT_MASK(remote))
ret |= IPI_MB_STATUS_SEND_PENDING;
status = mmio_read_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET);
if (status & IPI_BIT_MASK(remote))
ret |= IPI_MB_STATUS_RECV_PENDING;
return ret;
}
/* ipi_mb_notify() - Trigger IPI mailbox notification
*
* @local - local IPI ID
* @remote - remote IPI ID
* @is_blocking - if to trigger the notification in blocking mode or not.
*
* It sets the remote bit in the IPI agent trigger register.
*
*/
void ipi_mb_notify(uint32_t local, uint32_t remote, uint32_t is_blocking)
{
uint32_t status;
mmio_write_32(IPI_REG_BASE(local) + IPI_TRIG_OFFSET,
IPI_BIT_MASK(remote));
if (is_blocking) {
do {
status = mmio_read_32(IPI_REG_BASE(local) +
IPI_OBR_OFFSET);
} while (status & IPI_BIT_MASK(remote));
}
}
/* ipi_mb_ack() - Ack IPI mailbox notification from the other end
*
* @local - local IPI ID
* @remote - remote IPI ID
*
* It will clear the remote bit in the isr register.
*
*/
void ipi_mb_ack(uint32_t local, uint32_t remote)
{
mmio_write_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET,
IPI_BIT_MASK(remote));
}
/* ipi_mb_disable_irq() - Disable IPI mailbox notification interrupt
*
* @local - local IPI ID
* @remote - remote IPI ID
*
* It will mask the remote bit in the idr register.
*
*/
void ipi_mb_disable_irq(uint32_t local, uint32_t remote)
{
mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
IPI_BIT_MASK(remote));
}
/* ipi_mb_enable_irq() - Enable IPI mailbox notification interrupt
*
* @local - local IPI ID
* @remote - remote IPI ID
*
* It will mask the remote bit in the idr register.
* zynqmp_ipi_config_table_init() - Initialize ZynqMP IPI configuration data
*
*/
void ipi_mb_enable_irq(uint32_t local, uint32_t remote)
void zynqmp_ipi_config_table_init(void)
{
mmio_write_32(IPI_REG_BASE(local) + IPI_IER_OFFSET,
IPI_BIT_MASK(remote));
ipi_config_table_init(zynqmp_ipi_table, ARRAY_SIZE(zynqmp_ipi_table));
}
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